Real-Time Microcode Patching Using Pre-Loaded Array and Multiplexer
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Solution Overview
Problem
Existing microcode patch techniques introduce pipeline delays and are inflexible, limiting the ability to perform real-time microcode substitutions without impacting processor performance or requiring execution of instructions by the microprocessor.
Innovation Solution
A microcode patch apparatus and method that uses a microcode ROM address bus, patch array, and multiplexer to concurrently access microcode ROM and patch array, allowing for real-time one-to-one and one-to-many microcode patches without additional pipeline delay, and enables loading patches from external memory without executing instructions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If existing microcode patch techniques are used, then microcode substitution is possible, but pipeline delays are introduced and processor performance is impacted
Solution Approach 1:
The patch array is pre-loaded with patch instructions during system initialization or fabrication, allowing immediate patching without runtime loading delays. The match between microcode ROM addresses and patch array entries is pre-established, enabling instant substitution when needed.
Solution Approach 2:
A multiplexer is introduced as an intermediary component that selectively switches between microcode ROM and patch array outputs based on hit signals. This mediator enables seamless switching without pipeline disruption, as the multiplexer operates in parallel with the existing microcode fetch path.
2Adaptability or versatility
If existing microcode patch techniques are used, then microcode patching is possible, but the system becomes less flexible and requires instruction execution
Solution Approach 1:
The microcode storage is segmented into two independent paths: the original microcode ROM and the new patch array. This segmentation allows flexible combination of both sources without interfering with each other, enabling selective patching while maintaining the original microcode functionality.
Solution Approach 2:
The patch array and multiplexer structure provides multi-functionality: it supports one-to-one patching, one-to-many patching, and can be configured to support different patching scenarios without requiring separate mechanisms, thereby reducing overall system complexity.
3Adaptability or versatility
If microcode patches are loaded from external memory, then patch updates are possible, but additional pipeline delay is introduced
Solution Approach 1:
Patches are pre-loaded into the on-chip patch array during system initialization or fabrication rather than being fetched from external memory during runtime. This preliminary action eliminates the need for external memory access during patch application, preventing throughput degradation.
Solution Approach 2:
The essential patch data is copied from external memory into the on-chip patch array during initialization. This copying process allows the original external memory to be replaced by a smaller on-chip storage, trading off initialization time for runtime performance without impacting processor throughput during patch application.
Data Source
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AI summary
An apparatus for performing microcode patches that is both fast and flexible. In one embodiment, an apparatus for performing a real-time microcode patch is provided. The apparatus includes a patch array and a mux. The patch array receives a microcode ROM address and determines that the microcode ROM address matches one of a plurality of entries within the patch array. When the microcode ROM address matches, the patch array outputs a corresponding patch instruction and to assert a hit signal. The mux receives the patch instruction from the patch array and a micro instruction corresponding to the microcode ROM address from a microcode ROM. The mux provides the micro instruction or the corresponding patch instruction to an instruction register based upon the state of the hit signal.