Microcontroller Clock Generator for Selective Peripheral Activation

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Solution Overview

Problem

Conventional power reduction methods in microcontrollers require switching off all clocks, including peripheral modules, to achieve ultra-low power modes, which reduces device functionality and increases power consumption when only a single peripheral needs to be active.

Innovation Solution

Implementing a clock control system that allows specific peripheral modules to reactivate their clocks in response to internal or external trigger events, using an event handler and clock generator to resume clock generation only for the requesting modules, minimizing overall power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If all clocks are switched off to achieve ultra-low power modes, then power consumption is reduced, but device functionality is reduced

Engineering Contradiction:

Improvepower consumptionVSAvoiddevice functionality

Core Design Contradiction:

Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The patent segments the clock system into a main clock and multiple peripheral clocks that can be independently controlled. The clock generator can selectively activate only the specific peripheral modules that need to respond to events, rather than activating all clocks simultaneously. This segmentation allows the system to maintain ultra-low power consumption while preserving the functionality of individual modules when needed.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic clock control where the clock generator can transition between different states based on event triggers. The system dynamically adjusts which peripheral modules receive clock signals based on real-time needs, allowing modules to be activated or deactivated on-demand. This dynamic approach enables the system to optimize between power consumption and functionality based on actual operational requirements.

Inventive Principle:

Principle #15Dynamics

2Use of energy by moving object

If all clocks are switched off to achieve ultra-low power modes, then power consumption is reduced, but peripheral modules become unavailable

Engineering Contradiction:

Improvepower consumptionVSAvoidperipheral module availability

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The patent divides the clock distribution system into independent segments, with each peripheral module having its own controllable clock signal path. This segmentation allows individual modules to be activated independently without affecting the power state of other modules, ensuring that peripheral availability is maintained for specific functions while maintaining ultra-low power consumption overall.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The clock generator acts as an intermediary between the power management system and peripheral modules. It receives control signals and selectively distributes clock signals to specific peripherals based on event triggers. This intermediary mechanism ensures that peripherals remain available when needed while allowing the system to maintain low power consumption by keeping most peripherals in a powered-off state.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Adaptability or versatility

If selective clock reactivation is implemented, then peripheral modules can respond to events in sleep mode, but implementation complexity increases

Engineering Contradiction:

Improveperipheral module responsivenessVSAvoidclock control system complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The clock generator is designed as a multi-functional component that handles multiple tasks: it generates clock signals for various peripheral modules, manages clock activation based on event triggers, and coordinates power state transitions. By consolidating these functions into a single universal component, the patent reduces overall system complexity compared to implementing separate control mechanisms for each peripheral module.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements a feedback mechanism where peripheral modules or event handlers signal the clock generator when clock activation is needed. This feedback loop allows the system to automatically reactivate appropriate peripherals in response to events without requiring complex manual control logic, thereby reducing implementation complexity while maintaining peripheral responsiveness.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS8255722B2Microcontroller with clock generator for supplying activated clock signal to requesting module to conserve power

Publication Date: 2012.08.28 ATMEL CORP

AI summary

The disclosed implementations provide for power reduction in microcontrollers by reactivating a clock in the microcontroller for one or more peripheral modules in response to an internal or external trigger event, thus allowing the one or more peripheral modules to respond to events while operating in a low-power sleep mode. In some implementations, one or more peripheral modules in a microcontroller provide a clock request signal to a clock generator in the microcontroller. In response to the clock request signal, the clock generator reactivates one or more oscillator sources. The clock generator resumes clock generation only for the one or more requesting peripheral modules, keeping power consumption in the microcontroller to a minimum and not disturbing other modules in the microcontroller.