Microelectronic Path Excitation for Non-Disruptive Timing Testing

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Solution Overview

Problem

Testing the operation of microelectronic circuits for timing events without disrupting normal operations and adapting to varying processing capabilities is challenging, especially when high clock frequencies and low operating voltages can lead to timing issues.

Innovation Solution

A method and system for organizing the excitation of processing paths in a microelectronic circuit using decision-making software, scheduling, and idle periods to apply test signals without interfering with normal operations, allowing for flexible and controlled timing event detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If processing paths are excited with test signals to detect timing events, then timing event detection capability is improved, but normal operation of the microelectronic circuit is disrupted

Engineering Contradiction:
Improvetiming event detection capabilityVSAvoidnormal operation continuity
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The system dynamically adjusts the excitation schedule based on operational context, transitioning between normal operation mode and test mode. The decision-making software evaluates current circuit state and determines optimal excitation timing, making the testing process adaptive rather than static. This resolves the contradiction by making the system flexible - it can detect timing events when needed while minimizing disruption to normal operations.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The microelectronic circuit performs self-testing through automated excitation and monitoring without requiring external intervention. The decision-making software autonomously determines when and how to excite processing paths, and the circuit monitors its own timing events. This self-service capability enables continuous reliability verification while maintaining normal operational flow, as the system handles testing internally without disrupting external operations.

Inventive Principle:
Principle #25Self-service

2Loss of time

If testing is performed frequently to ensure timely detection of timing events, then detection timeliness is improved, but power consumption and circuit disturbance increase

Engineering Contradiction:
Improvedetection timelinessVSAvoidpower consumption
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

Instead of continuous testing, the system employs periodic excitation of processing paths at strategically determined intervals. The decision-making software schedules excitation events based on operational patterns and risk assessment, performing tests periodically rather than continuously. This approach maintains timely detection capability while significantly reducing power consumption and circuit disturbance compared to continuous testing.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The system changes operational parameters dynamically - adjusting excitation frequency, amplitude, and timing based on circuit state and operational context. The decision-making software modulates test signal parameters to achieve effective detection with minimal energy expenditure. By varying parameters rather than maintaining constant high-intensity testing, the system achieves timely detection while conserving power and reducing disturbance.

Inventive Principle:
Principle #35Parameter changes

3Use of energy by moving object

If adaptive voltage and clock frequency control is used to manage power consumption, then power efficiency is improved, but timing event risk increases

Engineering Contradiction:
Improvepower consumptionVSAvoidtiming event risk
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The system implements feedback control where the decision-making software continuously monitors operational conditions including voltage and clock frequency levels. When adaptive voltage/frequency control is applied, the system feedbacks this information to the testing subsystem, which adjusts excitation parameters accordingly. This feedback loop enables the system to maintain power efficiency while compensating for increased timing risk - the testing adapts to the reduced margins created by low-voltage/low-frequency operation.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

Before applying adaptive voltage and frequency control that may increase timing risk, the system performs preliminary assessment and prepares testing parameters in advance. The decision-making software pre-configures excitation signals and monitoring thresholds appropriate for the anticipated operating conditions. This preliminary preparation ensures that when power-saving modes are activated, the system is already positioned to detect timing events effectively, thus managing the increased risk while maintaining power efficiency.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12182612B2Method, arrangement, and computer program product for organizing the excitation of processing paths for testing a microelectric circuit
Publication Date: 2024.12.31 MINIMA PROCESSOR OY
  • US12182612B2 patent drawing
  • US12182612B2 patent drawing
  • US12182612B2 patent drawing

AI summary

The excitation of processing paths in a microelectronic circuit is organized by providing one or more pieces of input information to a decision-making software, and executing the decision-making software to decide, whether one or more of said processing paths of the microelectronic circuit are to be excited with test signals. Deciding that said processing paths are to be excited with said test signals results in proceeding to excite said one or more of said processing paths with said test signals and monitoring whether timing events occur on such one or more excited processing paths. A timing event is a change in a digital value at an input of a respective register circuit on an excited processing path, which change took place later than an allowable time limit defined by a triggering signal to said respective register circuit.