Microfluidic Driving Circuit With Inverter Latch Signal Holding

The patent removes the storage capacitor from the driving circuit and replaces it with a latch circuit formed by two inverters. This extraction eliminates the bottleneck component that limited signal writing speed while maintaining signal retention capability through the latch mechanism, thereby resolving the contradiction between signal retention duration and signal writing speed.

The latch circuit uses feedback between the two inverters to maintain the signal state. The output of each inverter is fed back to the input of the other, creating a stable bistable system that can hold the signal without requiring a storage capacitor, thus achieving both fast writing and sustained retention.

By extracting the storage capacitor and replacing it with a latch circuit based on two inverters, the patent reduces device complexity. The latch circuit uses standard logic gate components that are simpler and more scalable than dedicated storage capacitor structures, particularly for large-scale arrays.

The inverter-based latch circuit serves multiple functions: it provides signal retention, enables fast writing, and can be easily scaled for large-scale arrays. This universal approach using standard logic components replaces the specialized storage capacitor structure, reducing overall device complexity while maintaining functionality.

The patent eliminates the storage capacitor, which is a passive component requiring continuous power to maintain charge. The active latch circuit using two inverters maintains signal state through feedback without requiring continuous power input, significantly reducing power consumption while maintaining signal retention capability.

The latch circuit is self-maintaining through its feedback mechanism. Once the signal is written, the cross-coupled inverters automatically maintain the state without requiring external power input or active maintenance, making the system self-sufficient and reducing overall power consumption.