Micro-LED Reconstitution on Silicon Carrier for Hybrid Bonding
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Solution Overview
Problem
Current methods for bonding high-density arrays of micro-sized diodes to a backplane face challenges such as particle contamination, coefficient of thermal expansion (CTE) mismatch, alignment issues, and thermal budget limitations, which affect the yield and reliability of optoelectronic structures like micro LEDs in displays and sensors.
Innovation Solution
A reconstitution process is employed where micro-sized diodes are transferred to a synthetic silicon carrier, forming via contacts as part of a reconstituted wiring layer, followed by wafer-to-wafer bonding to a CMOS substrate, decoupling die-to-wafer and wafer-to-wafer alignment, and allowing high-temperature processing on the growth substrate to mitigate these issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If wafer bonding techniques are used to transfer micro LEDs, then mass transfer efficiency is improved, but particle contamination and alignment issues worsen
Solution Approach 1:
The process is divided into distinct stages: first transferring micro LED arrays to intermediate carrier substrates, then singulating into individual dies, and finally mounting to the backplane. This segmentation allows each stage to be optimized independently, reducing particle contamination during transfer while maintaining high mass transfer efficiency through wafer bonding techniques.
Solution Approach 2:
Carrier substrates are introduced as intermediary elements between the micro LED growth substrates and the final backplane. These carrier substrates serve as temporary holding platforms that enable controlled transfer and singulation processes, minimizing particle generation and alignment errors during the bonding operations.
2Quantity of substance
If high-density arrays of micro-sized diodes are bonded to backplane, then pixel density is improved, but alignment precision and yield worsen
Solution Approach 1:
Alignment features and positioning structures are prepared in advance on both the carrier substrates and backplane before the actual bonding process. This preliminary preparation ensures that even at high pixel densities, the alignment precision is maintained by having pre-established reference points for accurate positioning during wafer bonding.
3Reliability
If high-temperature processing is performed on growth substrate, then diode performance is improved, but CTE mismatch and thermal stress worsen
Solution Approach 1:
The carrier substrate acts as a thermal intermediary that is compatible with both the high-temperature processing requirements for diode performance and the final silicon backplane. This intermediate platform allows high-temperature annealing and processing to be performed without subjecting the micro LEDs to CTE mismatch stresses, as the carrier substrate can be selected to match thermal expansion characteristics during critical processing steps.
4Ease of manufacture
If dicing is performed through growth substrates, then singulation is achieved, but particle contamination increases
Solution Approach 1:
The singulation process is segmented to occur after transfer to carrier substrates rather than through the original growth substrates. This allows dicing to be performed on thinner, more controllable carrier substrates that generate fewer particles, while the micro LEDs are already positioned and secured on these carriers, maintaining singulation capability with reduced contamination.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables high pixel densities, reduces yield fallout due to dicing particles and alignment errors, and allows for high-temperature processing without CTE-induced stresses, resulting in improved product yields and reliability of optoelectronic structures.
Implementation Method 1
hybrid bonding the reconstituted substate to a backplane
Implementation Method 2
directly bonded with the array of backplane contact pads with metal-metal bonds
Implementation Method 3
die-to-wafer bonding the array of coupons to the second carrier substrate
Data Source
AI summary
Optoelectronic structures and methods of formation are described. In an embodiment, an optoelectronic structure includes a backplane with a driving circuitry and an array of contact pads, and a device layer bonded to the backplane. The device layer may include an array of micro-sized diodes and landing pads, and a reconstituted wiring layer including an array of via contacts connected to the array of landing pads. The reconstituted wiring layer can be directly bonded with the array of contacts with metal-metal bonds. A placement distribution of the array of landing can be decoupled from a position distribution of the array of via contacts.