MicroLED Waveguide Interconnects for Dense Optical Chip Links

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Solution Overview

Problem

Current chip-to-chip interconnects face limitations in density and power dissipation due to fundamental constraints of electrical interconnects, which hinder the performance of high-performance computing and networking systems, while optical interconnects offer potential solutions but are challenging to integrate with standard technology.

Innovation Solution

The integration of optical components into integrated circuits, including a semiconductor substrate with transistors, alternating metal and dielectric interconnect layers, microLEDs, and photodetectors, with optimized light passageways and waveguides to facilitate high-speed optical interconnects, addressing the limitations of electrical interconnects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If electrical interconnects are used for chip-to-chip connections, then integration with standard technology is achieved, but interconnect density and power dissipation performance are fundamentally limited

Engineering Contradiction:
Improveintegration with standard technologyVSAvoidpower dissipation
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent replaces electrical interconnects with optical interconnects, substituting the electrical field-based signal transmission mechanism with an optical field-based mechanism. This substitution fundamentally changes the physical domain from electrical to optical, enabling higher bandwidth and lower power consumption while avoiding the RC time constant limitations that constrain electrical interconnects

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the fundamental operating parameters by transitioning from electrical signals to optical signals. This parameter change enables operation at different frequency ranges and allows for higher data rates without being constrained by electrical resistance and capacitance, thereby improving power efficiency and interconnect density

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If chip-to-chip connections are implemented with higher density, then interconnect capacity increases, but power consumption increases due to fundamental electrical interconnect limitations

Engineering Contradiction:
Improveinterconnect densityVSAvoidpower consumption
Core Design Contradiction:
Quantity of substanceVSLoss of energy

Solution Approach 1:

The patent substitutes optical interconnects for electrical interconnects to achieve high density without proportional increases in power consumption. Optical signals experience significantly lower attenuation and do not suffer from the same RC time constant limitations as electrical signals, allowing for higher density interconnects with improved power efficiency

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Speed

If optical transceivers are integrated with standard technology, then optical interconnect performance is achieved, but integration complexity increases

Engineering Contradiction:
Improveoptical interconnect performanceVSAvoidintegration complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent merges optical transceiver components with standard semiconductor fabrication processes and existing interconnect architectures. By integrating optical sources, modulators, and detectors directly onto standard semiconductor substrates using compatible manufacturing techniques, the patent achieves high-speed optical interconnects while minimizing the increase in device complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent designs optical transceiver components that can be integrated using standard semiconductor manufacturing processes, making the optical interconnect technology universally applicable to existing technology nodes and architectures. This multi-functionality approach allows the same fabrication infrastructure to produce both standard electrical interconnects and advanced optical interconnects

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables dense parallel optical chip-to-chip interconnects that significantly reduce latency and power consumption, enhancing system performance beyond the limitations of electrical interconnects, thereby supporting advanced packaging and high-performance computing applications.

Implementation Method 1

a microLED on a pad on the stack of interconnect layers, with at least one electrical connection coupling the pad and at least one transistor of the semiconductor substrate

Methodology Applied
Scientific EffectLight Emitting Diode: Light Emitting Diode

Implementation Method 2

a photodetector integrated in the semiconductor substrate, with a light passageway to the photodetector through the stack of interconnect layers

Methodology Applied
Scientific EffectPhotoelectric Effect: Photoelectric Effect

Implementation Method 3

a first waveguide on the stack of interconnect layers, the first waveguide extending over the light passageway to the photodetector through the stack of interconnect layers

Methodology Applied
Scientific EffectTotal Internal Reflection: Total Internal Reflection

Data Source

PatentUS20250093600A1Integration of oe devices with ics
Publication Date: 2025.03.20 AVICENATECH CORP
  • US20250093600A1 patent drawing
  • US20250093600A1 patent drawing
  • US20250093600A1 patent drawing

AI summary

Optical interconnects for IC chips may include optical sources and receivers integrated with the IC chips. MicroLEDs may be mounted on an interconnect layer of the IC chip, and embedded within a waveguide. Photodetectors to receive light from the waveguide may be fabricated in a top surface of a semiconductor substrate, below a level of the interconnect layer, but with a passageway for light through the interconnect layer.