MIM Capacitor Interconnect Array for Higher Self-Resonant Frequency

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Solution Overview

Problem

Existing capacitors face limitations in self-resonant frequency and quality factor (Q-factor) at high frequencies, which restrict their operational frequency and efficiency, particularly in 5G and mmWave applications.

Innovation Solution

A modified metal-insulator-metal (MIM) capacitor design with distributed interconnects along the device periphery, extending the top conductor electrode to cover the RF ground plane and distributing vias alongside, optimizing current density and improving self-resonant frequency and Q-factor without altering fabrication processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional capacitor design is used, then the structure is simple and easy to manufacture, but the self-resonant frequency is limited and Q-factor deteriorates at high frequencies

Engineering Contradiction:
Improveself-resonant frequencyVSAvoidinterconnect structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The capacitor interconnect structure is segmented into multiple distributed interconnects arranged in a specific pattern around the capacitor plates. This segmentation allows each interconnect to carry a portion of the current, reducing the overall inductance and improving the self-resonant frequency while maintaining manufacturability through standard fabrication processes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The interconnects are arranged in a two-dimensional distributed pattern around the capacitor plates rather than using a single centralized connection. This dimensional transformation from point-to-point connection to distributed perimeter arrangement reduces current path length and inductance, thereby improving high-frequency performance without significantly complicating the fabrication process.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If a conventional capacitor design is used, then the manufacturing process is simple, but the Q-factor gets worse at higher frequencies

Engineering Contradiction:
ImproveQ-factorVSAvoidfabrication process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The capacitor interconnect structure is segmented into multiple distributed interconnects arranged in a specific pattern around the capacitor plates. This segmentation allows each interconnect to carry a portion of the current, reducing the overall inductance and improving the self-resonant frequency while maintaining manufacturability through standard fabrication processes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The design changes the geometric parameters of the interconnects (number, position, and arrangement) to optimize the current distribution and reduce parasitic inductance. These parameter modifications are achieved through standard photolithography and metallization processes, maintaining ease of manufacture while improving Q-factor at high frequencies.

Inventive Principle:
Principle #35Parameter changes

3Speed

If the capacitor operates at higher frequencies, then the operational frequency range is improved, but the capacitance value increases exponentially approaching self-resonant frequency

Engineering Contradiction:
Improveoperational frequencyVSAvoidcapacitance stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The capacitor interconnect structure is segmented into multiple distributed interconnects arranged in a specific pattern around the capacitor plates. This segmentation allows each interconnect to carry a portion of the current, reducing the overall inductance and improving the self-resonant frequency while maintaining manufacturability through standard fabrication processes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The design converts the harmful effect of parasitic inductance in interconnects into a benefit by strategically arranging the distributed interconnects to create opposing magnetic fields that cancel each other out. This cancellation effect reduces the net inductance, allowing the capacitor to maintain stable capacitance values at higher frequencies before reaching self-resonance.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS12456577B2Capacitor with array of interconnects for improved self-resonant frequency and quality factor
Publication Date: 2025.10.28 DELL PROD LP
  • US12456577B2 patent drawing
  • US12456577B2 patent drawing
  • US12456577B2 patent drawing

AI summary

The technology described herein is directed towards a capacitor with a modified design (relative to standard capacitors), in which a first conductor is coupled to a second conductor via a distributed array of conducting interconnects through a dielectric that separates the conductors. The array of interconnects can be geometrically distributed. The array of conducting interconnects, not present in standard capacitors, results in capacitors with larger self-resonant frequency, e.g., having a substantially stable capacitance over a range of high radio frequencies, e.g., from one gigahertz to twenty gigahertz. This further provides an improved quality factor. The improvements resulting from the array of interconnects, facilitates more optimal surface current density. The modified capacitor provides benefits in various circuits, e.g., in a tuning element as part of an impedance matching network, in a millimeter wave frequency phase shifter for antenna elements, and so on.