MIM Capacitor Offset Plates Simplify Via Etching
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Solution Overview
Problem
The existing methods for fabricating MIM capacitors in integrated circuits face challenges in etching via holes that need to stop on multiple materials and layers, requiring precise etching conditions that are difficult to achieve, especially when forming MIM capacitors between the LM and LM-1 metallization layers.
Innovation Solution
The proposed solution involves forming MIM capacitors with an inlaid bottom plate and offset top and bottom plates, allowing via holes to pass completely through the capacitor plates without causing short-circuits, easing the etching process by relaxing the precision requirements for etching depths and materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If via holes are etched to stop on multiple materials and layers with high precision, then the MIM capacitor fabrication accuracy is improved, but the etching process complexity and difficulty increase
Solution Approach 1:
The via hole etching process is segmented into two distinct stages: first etching through the interlayer dielectric to the etch-stop layer, then continuing through the etch-stop layer to the underlying metal layer. The etch-stop layer acts as an intermediate segmentation point that divides the complex multi-material etching into manageable sections with different precision requirements.
Solution Approach 2:
An etch-stop layer is introduced as an intermediary layer between the interlayer dielectric and the underlying metal layer. This etch-stop layer serves as a mediator that provides a well-defined etching endpoint, allowing the etching process to stop at a controlled depth without requiring precise stopping on multiple different materials simultaneously.
2Ease of manufacture
If via holes pass completely through capacitor plates, then the etching precision requirements are relaxed, but the risk of short-circuits increases
Solution Approach 1:
The etch-stop layer serves as an intermediary barrier that prevents via holes from passing completely through the capacitor structure. It provides a controlled stopping point that is easier to achieve than precise stopping on metal layers, while simultaneously preventing direct contact between upper and lower capacitor plates, thus eliminating short-circuit risk.
Solution Approach 2:
The etch-stop layer is a sacrificial layer that is etched away during the via hole formation process. It serves its purpose as a temporary structure during manufacturing that enables easier etching control, and is subsequently removed or integrated into the final structure without compromising the capacitor's functionality.
Data Source
AI summary
An integrated metal-insulator-metal capacitor is formed so that there is an extension portion of its top plate that does not face any portion of the bottom plate, and an extension portion of its bottom plate that does not face any portion of the top plate. Vias connecting the MIM capacitor plates to conductors in an overlying metallization layer are formed so as to contact the extension portions of the top and bottom plates. Etching of the via holes is simplified because it is permissible for the via holes to punch through the extension portions of the capacitor plates. The bottom plate of the MIM capacitor is inlaid. The top plate of the MIM capacitor may be inlaid.