Mirror-Image Pillar Stacking for Compact Microelectronic Packages
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Solution Overview
Problem
Current microelectronic package stacking configurations face challenges in achieving smaller size and lower height while maintaining high bandwidth, as existing methods such as wirebond-wirebond, flip-chip/wirebond, thru-silicon-via, and package-on-package configurations have significant disadvantages.
Innovation Solution
A microelectronic package design featuring a first die attached to a substrate with pillars, and a second die stacked over the first die with pillars in a mirror-image configuration, using attachment materials like solder to connect the pillars, and encapsulating with a mold material to form a compact package.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional stacking configurations (wirebond-wirebond, flip-chip/wirebond, thru-silicon-via, package-on-package) are used, then microelectronic packages can be fabricated with stacked dice, but the packages have larger size and height
Solution Approach 1:
The patent transitions from conventional lateral wiring connections to vertical pillar connections through the substrate thickness dimension. Pillars extend through the substrate from the first surface to the second surface, enabling direct vertical interconnection between stacked dice and eliminating the need for complex lateral wirebonds and vias, thereby reducing package size and height.
Solution Approach 2:
The patent extracts and eliminates complex interconnection structures (wirebonds, lateral vias, and routing) by replacing them with simple vertical pillars that directly penetrate the substrate. This extraction of unnecessary complexity reduces both package volume and manufacturing complexity while maintaining high bandwidth.
2Length of stationary object
If conventional stacking configurations are used, then microelectronic packages can be fabricated, but the package height is increased
Solution Approach 1:
The patent uses vertical pillars extending through the substrate thickness to create direct through-substrate connections. This vertical dimension approach eliminates long lateral wirebonds and reduces the number of interconnection layers, thereby reducing package height while maintaining short signal paths for high bandwidth.
Solution Approach 2:
The substrate acts as an intermediary carrier with integrated vertical pillars that provide direct mechanical and electrical connection between stacked dice. This intermediary structure with through-substrate pillars eliminates the need for complex external wiring while maintaining reliable high-bandwidth connections.
3Volume of moving object
If through-substrate pillar connections are used, then package size is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent forms pillars within the substrate before stacking the dice. By pre-forming the pillar structures and their connection points in the substrate prior to die stacking, the alignment precision requirement is reduced as the pillars serve as pre-established guides and registration features for subsequent die attachment.
Solution Approach 2:
The through-substrate pillars serve dual functions: they provide mechanical support and electrical connection while simultaneously acting as self-aligning features during die stacking. The pillars' fixed positions in the substrate automatically guide die placement, reducing the need for high-precision external alignment processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the size and height of microelectronic packages while maintaining high bandwidth, addressing the limitations of existing stacking methods by creating a compact and efficient dice stack configuration.
Implementation Method 1
each of the plurality of second microelectronic die pillars is attached to a respective microelectronic substrate pillar with an attachment material
Data Source
AI summary
A microelectronic package may include stacked microelectronic dice, wherein a first microelectronic die is attached to a microelectronic substrate, and a second microelectronic die is stacked over at least a portion of the first microelectronic die, wherein the microelectronic substrate includes a plurality of pillars extending therefrom, wherein the second microelectronic die includes a plurality of pillars extending therefrom in a mirror-image configuration to the plurality of microelectronic substrate pillars, and wherein the second microelectronic die pillars are attached to microelectronic substrate pillars with an attachment material.