MIS Storage Capacitor Flicker Reduction in LCD Array Substrates
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Solution Overview
Problem
Liquid crystal displays (LCDs) experience flicker phenomena due to differences in thin film transistor (TFT) leakage when applying negative versus positive gray voltages, exacerbated by lower source driving voltages, which affect display quality and power consumption.
Innovation Solution
The design of an array substrate that forms a metal-insulator-semiconductor (MIS) storage capacitor using a P—Si semiconductor layer, first metal layer, and insulating layer, or second metal layer and dielectric spacer layer, where the P—Si semiconductor layer gathers holes under negative gray voltage and forms a depletion layer under positive gray voltage, reducing capacitance differences and TFT leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If lower source driving voltage is applied to reduce power consumption, then power consumption is reduced, but the difference of gray voltage between adjacent gray levels becomes smaller, making flicker phenomena more easily generated
Solution Approach 1:
The patent changes the electrical parameters of the storage capacitor by adjusting its capacitance value to compensate for the reduced voltage difference. By optimizing the capacitance parameter, the storage capacitor can maintain adequate charge storage capability even when the voltage difference between adjacent gray levels is small, thereby preventing flicker while using lower driving voltages
Solution Approach 2:
The storage capacitor is designed to pre-store electrical charge during the writing phase, creating a preliminary charge reservoir that compensates for the small voltage difference. This preliminary charge storage action ensures that the pixel maintains stable brightness during the display phase, preventing flicker phenomena caused by insufficient voltage difference
2Reliability
If the capacitance of storage capacitor under positive and negative gray voltage is made equal, then flicker phenomena are reduced, but the TFT leakage difference between positive and negative gray voltage remains
Solution Approach 1:
The patent converts the harmful effect of asymmetric TFT leakage into a beneficial outcome by designing the storage capacitor with asymmetric capacitance characteristics. The capacitor's capacitance value is optimized to compensate for the leakage difference, transforming the leakage asymmetry into a mechanism that balances the overall charge storage, thereby eliminating flicker while accounting for the leakage characteristics
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces TFT leakage and minimizes flicker phenomena, ensuring improved display quality by equalizing capacitance under both positive and negative gray voltages.
Implementation Method 1
the P—Si semiconductor layer gathers holes under negative gray voltage and forms a depletion layer under positive gray voltage
Implementation Method 2
the P—Si semiconductor layer gathers holes under negative gray voltage and forms a depletion layer under positive gray voltage
Implementation Method 3
the P—Si semiconductor layer and the first metal layer of the second zone are arranged insulated and overlapped through the insulating layer sandwiched between the P—Si semiconductor layer and the first metal layer of the second zone
Data Source
AI summary
The array substrate, the liquid crystal display panel and the liquid crystal display device of the present disclosure are designed to form the MIS storage capacitor by the P—Si semiconductor layer, the first metal layer and the insulating layer between above or the P—Si semiconductor layer, the second metal layer and the dielectric spacer layer between above, when one side of the first metal layer or the second metal layer receiving the negative gray voltage, the P—Si in the P—Si semiconductor layer will gather to form the hole, when receiving the positive gray voltage, will form the depletion layer on the upper layer of the P—Si to reduce the capacity of the MIS storage capacitor, thereby reducing the difference of the capacitance when the MIS storage capacitor in the positive and negative gray voltage, improving the flicker phenomena and ensuring the display effect.


