Mixed Cells for Adaptive Threshold Voltage Balance
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Solution Overview
Problem
The down-scaling of integrated circuits leads to unbalanced threshold voltages between N-type and P-type transistors, exacerbated by circuit topology and layout-dependent effects, which limits the minimum operating voltage and affects the performance of integrated circuits.
Innovation Solution
A semiconductor structure with a cell array comprising regular and mixed cells, where the mixed cells have adaptive threshold voltages by combining P-type and N-type transistors with different threshold voltage characteristics, reducing the voltage difference between them, and replacing regular cells with mixed cells in critical paths to optimize speed and leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If integrated circuits are down-scaled to become more compact, then device compactness is improved, but threshold voltage balance between N-type and P-type transistors deteriorates
Solution Approach 1:
The patent applies local quality by creating mixed cells with different threshold voltage configurations for P-type and N-type transistors in specific locations within the cell array. Instead of uniform transistor characteristics throughout the circuit, the invention selectively places transistors with optimized threshold voltages in critical regions to maintain voltage balance during down-scaling.
Solution Approach 2:
The patent changes the threshold voltage parameter of transistors by incorporating mixed cells that combine P-type and N-type transistors with different threshold voltage characteristics. This allows dynamic adjustment of voltage parameters to compensate for the imbalances caused by circuit topology and layout-dependent effects during down-scaling.
2Ease of manufacture
If process control limitation is considered, then manufacturing realism is improved, but threshold voltage balance deteriorates
Solution Approach 1:
The patent compensates for process control limitations by intentionally designing mixed cells with specific threshold voltage parameters that account for manufacturing variations. The different threshold voltage configurations in P-type and N-type transistors are selected to achieve balance despite process variations.
3Adaptability or versatility
If circuit topology such as stack gate is used, then device functionality is improved, but threshold voltage balance deteriorates
Solution Approach 1:
The patent addresses threshold voltage imbalance in specific circuit topologies like stack gates by implementing mixed cells with optimized transistor characteristics in those particular locations. The local customization of transistor parameters compensates for the topology-induced imbalances.
4Manufacturing precision
If layout-dependent effect such as diffusion break effect is considered, then layout accuracy is improved, but threshold voltage balance deteriorates
Solution Approach 1:
The patent compensates for layout-dependent effects like diffusion break by adjusting the threshold voltage parameters of transistors in mixed cells. The different threshold voltage configurations are selected to counteract the imbalances introduced by specific layout arrangements.
Data Source
AI summary
Semiconductor structures are provided. A semiconductor structure includes a cell array. The cell array includes a first regular cell, a second regular cell and a first mixed cell. Each P-type transistor has a first threshold voltage and each N-type transistor has a second threshold voltage in the first regular cell. Each P-type transistor has a third threshold voltage and each N-type transistor has a fourth threshold voltage in the second regular cell. Each P-type transistor has the first threshold voltage and each N-type transistor has the fourth threshold voltage in the first mixed cell. The first regular cell, the second regular cell and the first mixed cell are arranged in the same row of the cell array. The first mixed cell is arranged between the first and second regular cells and is in contact with the first regular cell.


