Semiconductor Memory Mats With Mixed Columns for Defect Replacement
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Solution Overview
Problem
In semiconductor memory devices with memory cell arrays divided into memory mats, the size of the sense amplifier region for redundant memory mats is insufficient compared to other mats, leading to suboptimal performance.
Innovation Solution
The implementation of mixed column planes with both error correction code functionality and spare column sections, ensuring equivalent column sizes and enabling efficient use of sub-amplifiers and data control circuits, while allowing for substitution of defective columns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a redundant memory mat with spare column section is added to substitute defective columns, then reliability is improved, but the sense amplifier region size becomes insufficient leading to performance degradation
Solution Approach 1:
The patent makes the sense amplifier region serve multiple functions by enabling it to handle both normal memory mat operations and redundant memory mat defect substitution. The sense amplifier region is designed with sufficient capacity to accommodate the mixed column plane operations, allowing it to function as both a standard sense amplifier and a defect substitution unit without requiring additional dedicated space.
Solution Approach 2:
The patent merges the normal memory mat functionality and redundant memory mat functionality into a single integrated structure. The mixed column plane combines spare columns and normal columns within the same memory mat, and the sense amplifier region is shared between both functions, eliminating the need for separate sense amplifier regions for redundant memory mats.
2Device complexity
If the column size of redundant memory mat is made smaller to fit available space, then device complexity is reduced, but performance becomes suboptimal compared to other memory mats
Solution Approach 1:
The patent applies local quality by creating a mixed column plane within the memory mat that has non-uniform column distribution. Specifically, certain column sections are designated as spare columns while others are normal columns, allowing the structure to have different local characteristics (spare vs. normal) within the same memory mat to achieve both defect substitution and performance consistency.
Data Source
AI summary
An apparatus that includes a plurality of first memory mats each including a plurality of normal column sections each storing user data, and a second memory mat including a plurality of first redundant column sections each substituting a defective one of column sections included in the plurality of first memory mats and a plurality of first BCC column sections each storing an error correction code.