Mixed-Shape Through Vias for Signal and Power Optimization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor devices face challenges in optimizing signal transmission and power distribution due to parasitic capacitance and resistance in through vias, which affect performance, integration density, and operating speed.
Innovation Solution
The semiconductor device incorporates through vias of varying shapes, including pillar and tube structures, to minimize parasitic capacitance and resistance, with pillar vias for signal transmission and tube vias for power distribution, enhancing electrical interconnections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If through vias are used to transfer signals and power between integrated circuits, then connectivity and integration density are improved, but parasitic capacitance and resistance increase, degrading signal transmission performance
Solution Approach 1:
The patent applies different via shapes (pillar vs. tube) for different functional requirements: pillar vias for data signals requiring low capacitance, and tube vias for power delivery requiring low resistance. This local differentiation optimizes performance for each specific application while maintaining high integration density.
Solution Approach 2:
The patent segments the via population into different types (pillar and tube) based on their electrical characteristics and functional requirements. This segmentation allows simultaneous optimization of signal transmission and power delivery paths, resolving the contradiction between connectivity density and transmission performance.
2Reliability
If pillar-shaped through vias are used, then parasitic capacitance is reduced for data signal transmission, but power delivery efficiency is limited compared to tube-shaped vias
Solution Approach 1:
The patent assigns pillar-shaped vias specifically to data signal paths where low capacitance is critical, while assigning tube-shaped vias to power delivery paths where low resistance is critical. This local quality differentiation resolves the trade-off between signal transmission and power delivery efficiency.
3Power
If tube-shaped through vias are used, then power delivery efficiency is improved due to lower resistance, but parasitic capacitance increases affecting data signal transmission
Solution Approach 1:
The patent restricts tube-shaped vias to power delivery applications where their low resistance characteristic is advantageous, while avoiding their use in data signal paths where capacitance would be problematic. This targeted application resolves the contradiction between power efficiency and signal integrity.
4Reliability
If multiple via shapes are implemented, then optimization for both data and power is achieved, but manufacturing complexity increases
Solution Approach 1:
The patent segments the via formation process into distinct steps for pillar and tube vias, using different etching and filling methodologies. While this increases manufacturing complexity, it enables simultaneous optimization of both data and power paths, achieving superior overall device performance.
Data Source
AI summary
A semiconductor device is provided with differently-shaped conductive through-vias, having different-shape horizontal cross-sections. The cross-sectional shapes of the via include but are not limited to circular and ring shaped, which are cross sections that correspond to vias that are pillar shaped and tube-shaped respectively.