Mixed UBM Interconnect Bridge for Heterogeneous Chip Integration
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Solution Overview
Problem
Existing semiconductor chip packaging technologies face challenges in efficiently integrating semiconductor chips with varying pitches and sizes using conventional under bump metallurgy (UBM) methods, which complicate the manufacturing process and increase costs.
Innovation Solution
The proposed solution involves a direct bonded heterogeneous integration (DBHi) structure with a bridge positioned in a trench of a substrate, where semiconductor chips are initially connected to pillars on the bridge before being attached to substrate pads, using under bump metallurgy (UBM) with mixed pitches and sizes, and controlled collapse chip connections (C4) to facilitate efficient electrical coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional under bump metallurgy (UBM) methods are used to integrate semiconductor chips with varying pitches and sizes, then electrical connections can be established, but the manufacturing process becomes complicated and costs increase
Solution Approach 1:
The patent segments the UBM structure into distinct pitch regions (first pitch and second pitch) that can be independently formed and controlled. This allows different pitch requirements to be satisfied without requiring a completely different manufacturing process, thereby reducing overall process complexity while maintaining reliable electrical connections for varying chip pitches and sizes
Solution Approach 2:
The patent applies different pitch characteristics to different regions of the substrate. The first pitch region is optimized for certain chip configurations while the second pitch region is optimized for others, allowing local optimization of electrical connections without complicating the global manufacturing process
2Reliability
If conventional UBM methods are used for heterogeneous integration, then chip connections can be made, but manufacturing costs increase
Solution Approach 1:
By segmenting the substrate into multiple pitch regions that can be formed using standard manufacturing techniques, the patent avoids the need for expensive custom fabrication processes. Each pitch region can be manufactured using existing UBM capabilities, reducing overall manufacturing costs while ensuring reliable chip connections for heterogeneous integration
Solution Approach 2:
The patent creates a universal substrate structure that can accommodate multiple chip types with different pitch requirements using the same manufacturing process. This multi-functional approach eliminates the need for separate manufacturing lines or specialized processes for different chip configurations, thereby reducing manufacturing costs
3Adaptability or versatility
If mixed pitch/size UBM is implemented, then heterogeneous integration is enabled, but structural complexity increases
Solution Approach 1:
The patent divides the UBM structure into discrete pitch regions with clearly defined boundaries and characteristics. This segmentation allows the structure to accommodate heterogeneous integration requirements while maintaining a relatively simple overall architecture, as each region can be independently characterized and managed without creating excessive structural complexity
Data Source
AI summary
An electronic package and a method of manufacture includes a substrate having an upper surface with a trench formed in a bridge region. First pads are arranged on the upper surface of the substrate, outside of the bridge region, and a bridge is positioned in the trench. A plurality of second pads are arranged on an upper surface of the bridge. A plurality of pillars are electrically coupled to the plurality of second pads. Two or more semiconductor chips are positioned in a side-by-side proximal arrangement overlaying the bridge and the substrate. A first semiconductor chip is joined to the bridge, then a second semiconductor chip is joined to the bridge, followed by attaching the chip-bridge assembly to the substrate with the bridge positioned within the substrate trench. Each of the two or more semiconductor chips have first electrical connections including bumps, and second electrical connections including third pads.