Block Closure Technique for MLC Flash Memory Data Retention
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Solution Overview
Problem
Flash memory devices face reliability issues due to threshold voltage shifting over time, leading to data degradation and increased latency in accessing stored data, as charge leakage causes voltage drift, affecting data retention and storage density.
Innovation Solution
Implementing a block closure technique that maintains a common set of cell voltage distribution and error correcting code (ECC) parameters for closed multi-level cell (MLC) blocks, allowing for efficient data access without re-adjusting read circuitry or ECC decoders, thereby reducing latency and improving data retention detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple sets of CVD tracking parameters and threshold voltages are maintained for different word lines in a closed MLC block, then data accuracy can be preserved, but device complexity and read operation latency increase
Solution Approach 1:
The patent merges multiple sets of CVD tracking parameters and threshold voltages into a single common set that is shared across all word lines in a closed MLC block. This eliminates the need to maintain separate parameter sets for each word line, thereby reducing device complexity while preserving data accuracy through the use of a unified parameter framework.
Solution Approach 2:
The common set of CVD tracking parameters and threshold voltages serves multiple word lines simultaneously, making the parameter system universal. This multi-functional approach allows a single parameter set to be applied across different word lines in the closed block, reducing the overall complexity of parameter management while maintaining reliable data access.
2Reliability
If multiple sets of ECC control data are maintained for different word lines, then decoding accuracy is improved, but read latency increases due to re-calibration requirements
Solution Approach 1:
The patent combines multiple sets of ECC control data into a single common set that is shared across all word lines in the closed MLC block. This eliminates the need for re-calibration when reading different word lines, as the same ECC control data can be used for all word lines in the closed block, thereby reducing read latency while maintaining decoding accuracy.
Solution Approach 2:
The common set of ECC control data is prepared and stored in advance for the closed MLC block, eliminating the need for on-demand re-calibration when reading different word lines. This preliminary preparation of the ECC control data ensures that decoding can proceed efficiently without time-consuming adjustments, reducing read latency while preserving accuracy.
3Reliability
If read circuitry is re-adjusted for each word line in a closed block, then data sensing accuracy is maintained, but operational speed decreases
Solution Approach 1:
The patent merges the read circuitry adjustment requirements into a single common set of threshold voltages that applies to all word lines in the closed MLC block. This eliminates the need to re-adjust read circuitry for each word line, allowing the circuitry to remain optimized for a single parameter set across all word lines, thereby maintaining sensing accuracy while improving read operation speed.
Data Source
AI summary
A data storage device includes a non-volatile memory and a controller. A method includes initiating a write operation to write first data to a first word line of a multi-level cell (MLC) block of the non-volatile memory. The method further includes compensating, in response to an event that interrupts programming at the first word line, for incompletion of a write disturb effect at the MLC block due to the event by copying second data from a second word line of the MLC block to a second block of the non-volatile memory or by writing dummy data to the second word line.