MLC Flash Self-RAID Parity Layout for Power-Loss Recovery

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Solution Overview

Problem

Multiple-level-cell (MLC) flash memory devices are vulnerable to data corruption due to unpredictable power interruptions, limited erase-write cycles, and integrity issues caused by read and program disturbs, which existing error correction codes and RAID techniques struggle to address effectively, especially in enterprise mass storage environments.

Innovation Solution

A two-dimensional self-RAID method is implemented, where a parity sector is reserved in each data page for first-dimensional RAID and group parity is calculated across columns of sectors for second-dimensional RAID, enabling recovery of corrupted data by utilizing parity values stored in reserved sectors and group parity pages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If MLC flash memory is used to increase storage capacity and reduce cost, then storage density and cost-effectiveness are improved, but data reliability and resistance to power interruption corruption deteriorate

Engineering Contradiction:
Improvestorage capacityVSAvoiddata protection against power interruption
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The flash memory data structure is segmented into multiple pages (data pages and parity pages) organized in a RAID-like configuration. Each page is further divided into sectors with dedicated parity sectors. This segmentation allows independent protection of data units, enabling recovery from power interruptions affecting individual pages or sectors.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Parity data is pre-calculated and stored in dedicated parity sectors within each page and in separate parity pages before actual data storage operations. This preliminary preparation of redundancy information enables immediate data recovery without requiring complex real-time calculations when power interruptions occur.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If error correction codes and traditional RAID techniques are applied to protect against data corruption, then data reliability is improved, but device complexity and processing overhead increase

Engineering Contradiction:
Improvedata protectionVSAvoidcomplexity of error correction implementation
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges RAID redundancy concepts with flash memory page structure to create a unified protection scheme. Parity sectors are integrated within data pages, and parity pages are organized alongside data pages, combining storage and protection functions into a single cohesive system that simplifies implementation compared to separate error correction systems.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The flash memory system performs self-protection through built-in parity calculation and storage mechanisms. The controller automatically calculates parity data and stores it in designated sectors and pages, enabling the system to self-heal from power interruption corruption without requiring external intervention or complex additional hardware.

Inventive Principle:
Principle #25Self-service

3Reliability

If parity calculation and storage is implemented across all sectors, then data recovery capability is improved, but write performance and storage efficiency deteriorate

Engineering Contradiction:
Improvedata recovery capabilityVSAvoidwrite performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

Rather than applying uniform parity protection to all sectors equally, the patent implements selective parity protection where specific sectors are designated as parity sectors within pages, and specific pages are designated as parity pages. This local differentiation optimizes the balance between protection coverage and write performance by concentrating redundancy where most needed.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system implements partial parity protection by reserving only certain sectors within pages and certain pages for parity data, rather than protecting every sector with full redundancy. This partial action approach provides sufficient protection against power interruptions while minimizing the impact on write performance and usable storage capacity.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20120266052A1MLC Self-RAID Flash Data Protection Scheme
Publication Date: 2012.10.18 SANDISK TECHNOLOGIES LLC
  • US20120266052A1 patent drawing
  • US20120266052A1 patent drawing
  • US20120266052A1 patent drawing

AI summary

A two-dimensional self-RAID method of protecting page-based storage data in a MLC multiple-level-cell flash memory device. The protection scheme includes reserving one parity sector across each data page, reserving one parity page as the column parity, selecting a specific number of pages to form a parity group, writing into the parity page a group parity value for data stored in the pages of the parity group. The parity sector represents applying a RAID technique in a first dimension. The group parity represents applying a RAID technique in a second dimension. Data protection is achieved because a corrupted data sector can likely be recovered by the two dimensional RAID data.