Dynamic Program-Verify Adjustment for Multi-Level Cell Memory Arrays

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Solution Overview

Problem

As memory arrays increase in size, the widening of threshold voltage (Vth) distributions across the array and within pages reduces the margins between levels for a given voltage headroom, affecting the reliability and speed of reading and programming operations in multi-level cell (MLC) memory devices.

Innovation Solution

A method that dynamically determines and adjusts the program-verify levels for smaller groups of cells, such as chunks within a page, by setting adjust codes based on the maximum threshold voltage within those groups, thereby maintaining a constant read window and improving programming accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory arrays increase in size to increase storage capacity, then memory density is improved, but threshold voltage distribution widens reducing read/write margins

Engineering Contradiction:
Improvememory capacityVSAvoidread/write margin
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent divides the memory array into multiple sub-arrays, and each sub-array is further divided into chunks. By performing program-verify operations on smaller chunks rather than the entire array, the threshold voltage distribution width is reduced, maintaining adequate read/write margins even in large capacity memory devices.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent dynamically adjusts the program-verify threshold voltage based on the actual threshold voltage distribution measured in each chunk. Instead of using a fixed global verify threshold, the system adapts the verify level locally to match the actual data distribution, thereby optimizing the read/write margins for each specific region.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If conventional fixed program-verify levels are used across the entire array, then device complexity is reduced, but programming accuracy deteriorates due to Vth distribution variations

Engineering Contradiction:
Improvecontrol circuit complexityVSAvoidprogramming accuracy
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent performs a preliminary threshold voltage distribution measurement on each chunk before programming. Based on this preliminary measurement, the system pre-adjusts the program-verify threshold voltage to match the actual distribution characteristics of that chunk, ensuring optimal programming accuracy from the start.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the program-verify threshold voltage parameter dynamically based on the measured threshold voltage distribution of each chunk. By adjusting this critical parameter locally rather than using a fixed global value, the system achieves high programming accuracy across the entire large memory array.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7426139B2Dynamic program and read adjustment for multi-level cell memory array
Publication Date: 2008.09.16 MACRONIX INTERNATIONAL CO LTD
  • US7426139B2 patent drawing
  • US7426139B2 patent drawing
  • US7426139B2 patent drawing

AI summary

A method for operating a multi-level cell (“MLC”) memory array of an integrated circuit (“IC”) programs first data into a first plurality of MLCs in the MLC memory array at a first programming level. Threshold voltages for the first plurality of MLCs are sensed, and an adjust code is set according to the threshold voltages. Second data is programmed into a second plurality of MLCs in the MLC memory array at a second programming level, the second plurality of MLCs having a program-verify value set according to the adjust code. In a further embodiment, a reference voltage for reading the second plurality of MLCs is set according to the adjust code.