Multilayer Ceramic Capacitor Margin Thickness and Porosity Control
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Solution Overview
Problem
Existing multilayer ceramic capacitors face limitations in increasing capacitance due to difficulties in reducing the margin area of dielectric layers and internal electrodes, leading to vulnerabilities in mechanical strength and porosity issues during manufacturing.
Innovation Solution
The solution involves forming side margin parts with an average thickness of 18 μm or less using ceramic slurry, optimizing the porosity between the cover layer and these margin parts, and ensuring a porosity ratio that enhances mechanical strength and capacitance while minimizing porosity-related issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the margin area of dielectric layers is reduced to increase internal electrode overlap area, then capacitance is improved, but mechanical strength deteriorates due to vulnerability to impacts
Solution Approach 1:
The patent applies local quality by creating a cover layer with different porosity characteristics than the bulk dielectric layers. The cover layer has controlled porosity (1≦P1≦20) at the boundary surface with side margin parts, providing localized mechanical strength enhancement where impacts are most likely to occur, while maintaining thin overall margin parts to preserve capacitance.
2Quantity of substance
If the margin part thickness is reduced to increase internal electrode overlap area, then capacitance is improved, but porosity control becomes difficult leading to manufacturing issues
Solution Approach 1:
The patent segments the dielectric structure into distinct regions: bulk dielectric layers and a separate cover layer with controlled porosity. This segmentation allows independent optimization of each region - thin margin parts for capacitance and a specialized cover layer for porosity control and mechanical protection.
Solution Approach 2:
The patent changes the porosity parameter locally by creating a cover layer with controlled porosity (1≦P1≦20) at specific locations (boundary surfaces with side margin parts), while maintaining different porosity characteristics in other regions. This parameter change enables manufacturing precision without compromising capacitance.
3Quantity of substance
If the margin part thickness is reduced, then capacitance is improved, but reliability deteriorates due to vulnerability to thermal shock and external impacts
Solution Approach 1:
The patent implements beforehand cushioning by creating a cover layer with controlled porosity at the boundary surfaces between the ceramic multilayer body and side margin parts. This porous structure acts as a cushioning layer that absorbs and distributes mechanical stresses and thermal shocks before they reach the vulnerable thin margin parts, thereby enhancing reliability while maintaining thin margin thickness for high capacitance.
Data Source
AI summary
There is provided a multilayer ceramic capacitor including: a ceramic body having first and second side surfaces opposite to each other, and third and fourth end surfaces connecting the first and second side surfaces; a plurality of internal electrodes formed in the ceramic body and having one ends thereof exposed to the third or fourth end surface; and first and second side margin parts formed from the first and second side surfaces to respective edges of the internal electrodes, the first and second side margin parts having an average thickness of 18 μm or less, wherein when a boundary surface between a cover layer and the first or second side margin part in the ceramic body is divided into two regions in a thickness direction of the ceramic body, a region adjacent to the internal electrode is S1, and a porosity of S1 is P1, 1≦P1≦20 is satisfied.