Multilayer Ceramic Capacitor with Segmented Internal Electrodes for Low DC Resistance
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Solution Overview
Problem
High-frequency noise removal in power circuits is hindered by the high direct current (DC) resistance of 3-terminal multilayer ceramic capacitors, which limits their ability to handle high allowable currents and maintain stability in multifunctional and highly integrated LSI chips.
Innovation Solution
A multilayer ceramic capacitor design with a ceramic body featuring first and second internal electrodes laminated in specific regions to reduce DC resistance, allowing for high allowable currents and enhanced noise removal at high frequencies, along with a compact size and improved noise attenuation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional 3-terminal capacitor structure is used, then high frequency noise removal is achieved, but DC resistance is high which limits allowable current
Solution Approach 1:
The capacitor is divided into multiple capacitor units (first, second, third capacitor units) with different internal electrode configurations. Each unit contributes differently to the overall performance, with some optimized for low DC resistance and others for high frequency characteristics, allowing both requirements to be satisfied simultaneously.
Solution Approach 2:
Different regions of the capacitor have different internal electrode structures tailored to local functional requirements. The first capacitor unit has a specific electrode arrangement for low DC resistance, while the second and third units have different arrangements optimized for high frequency performance, creating local quality variations that resolve the contradiction.
2Volume of moving object
If capacitor size is reduced for compact design, then integration is improved, but DC resistance increases and allowable current decreases
Solution Approach 1:
The internal electrodes are arranged in multiple layers and dimensions within the compact ceramic body. By utilizing three-dimensional space efficiently with stacked electrode configurations, the capacitor achieves low DC resistance through multiple parallel current paths without increasing the external volume, thus resolving the contradiction between compact size and low DC resistance.
3Reliability
If internal power loss is reduced for improved reliability, then heating is minimized, but this requires complex electrode structures that increase manufacturing difficulty
Solution Approach 1:
Multiple functional requirements are merged into a single integrated electrode structure design. The internal electrodes are configured to simultaneously achieve low DC resistance, low equivalent series inductance, and reduced power loss through a unified lamination process, avoiding the need for separate complex structures and simplifying manufacturing while improving reliability.
Data Source
AI summary
There are provided a multilayer ceramic capacitor and a board having the same. The multilayer ceramic capacitor includes: three external electrodes disposed to be spaced apart from one another on a mounting surface of a ceramic body; first internal electrodes each including first and second lead portions connected to the outermost external electrodes, respectively; and second internal electrodes each including a third lead portion connected to the middle external electrode, in which a first region in which the first internal electrodes are laminated is disposed in a central portion of the ceramic body in a width direction of the ceramic body, and second regions in which the first and second internal electrodes are alternately laminated are disposed on both sides of the intervening first region in the width direction of the ceramic body.