Multilayer Ceramic Device Thinning to Prevent Cracks
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Solution Overview
Problem
Conventional multilayer ceramic electronic devices face challenges in preventing cracks and maintaining capacitance when dielectric layers are thinned to 0.5 μm or less, as existing technologies lack effective methods to address crack generation and capacitance drop.
Innovation Solution
The solution involves a specific dimensional relationship between the ceramic element body, dielectric layers, and internal electrode layers, including a thickness of 0.4 μm or less for dielectric layers, a width of 0.59 mm or less, a gap of 0.010 to 0.025 mm, and a ratio of gap to width of 0.025 or more, along with controlled grain sizes of dielectric grains to prevent crack generation and maintain capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the thickness of the dielectric layers is reduced to 0.5 μm or less to achieve miniaturization and thinning, then the device can meet miniaturization requirements, but cracks are generated during manufacturing and capacitance drops
Solution Approach 1:
The patent applies parameter changes by precisely controlling the thickness of the dielectric layer (0.5 μm or less) and the width of the internal electrode layers (0.05 μm or less) to specific ranges. By changing these dimensional parameters to extreme values, the patent achieves miniaturization while preventing crack generation and capacitance drop, directly resolving the technical contradiction between thinning and reliability
Solution Approach 2:
The patent applies local quality by making the internal electrode layers significantly thinner (0.05 μm or less) compared to the dielectric layer thickness, creating a localized structural difference. This local thinning of the internal electrode layers at critical positions prevents crack propagation and maintains capacitance, allowing the overall device to be miniaturized without sacrificing reliability
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If the thickness of the dielectric layers is reduced to 0.5 μm or less to achieve further miniaturization, then device size is reduced, but existing technologies cannot prevent crack generation and ensure capacitance
Solution Approach 1:
The patent pushes the parameter changes to extreme values by reducing the internal electrode layer width to 0.05 μm or less, which is significantly thinner than conventional structures. This extreme parameter change creates sufficient spacing between internal electrodes, preventing crack generation during manufacturing while enabling dielectric layers to be thinned to 0.5 μm or less, thereby achieving further miniaturization with improved manufacturability
Solution Approach 2:
The patent applies preliminary action by pre-designing the internal electrode layers with extreme thinness (0.05 μm or less) before the lamination and firing processes. This preliminary structural design prevents crack generation during subsequent manufacturing steps, enabling the production of ultra-thin dielectric layers (0.5 μm or less) without crack issues, thus advancing manufacturing capability
Data Source
AI summary
A multilayer ceramic electronic device comprising: a ceramic element body, in which a plurality of dielectric layers and a plurality of internal electrode layers are alternately stacked, and at least a pair of external electrodes which are connected to the internal electrode layers on surfaces of the ceramic element body; a thickness of the dielectric layers is 0.4 μm or less, a width (W0) of the ceramic element body along a width-direction is 0.59 mm or less, a gap (Wgap) between an outer face of the ceramic element body and an end of the internal electrode layers along width-direction of the ceramic element body is 0.010 to 0.025 mm, and a ratio (Wgap/W0) of the gap with respect to the width is 0.025 or more.