Multilayer Ceramic Capacitor Reducing ESL via Three-Terminal Vertical Structure

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Solution Overview

Problem

The increasing equivalent series inductance (ESL) of multilayer ceramic capacitors deteriorates the performance of electronic products, particularly in miniaturized and high-capacitance applications, where traditional capacitors fail to maintain performance due to increased inductance and current flow path length.

Innovation Solution

A multilayer ceramic capacitor with a three-terminal vertical structure is designed, featuring external electrodes spaced apart on a ceramic body's mounting surface, with internal electrodes exposed to the opposing surface and an insulating layer, reducing the current path length and inductance by shortening the current loop when an alternating current signal is applied.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional multilayer ceramic capacitor structure is used, then manufacturing is simpler, but equivalent series inductance increases and performance deteriorates

Engineering Contradiction:
ImproveESL characteristicsVSAvoidthree-terminal vertical multilayer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The capacitor is divided into multiple functional layers including insulating layers and internal electrodes arranged in a segmented pattern. The internal electrodes are divided into first and second internal electrodes with different orientations, creating distinct current paths that reduce inductance through segmented current flow rather than a single continuous path.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a traditional planar two-terminal structure to a three-terminal vertical multilayer structure. The external electrodes are positioned on the mounting surface and spaced apart, with internal electrodes extending vertically through multiple layers, utilizing the third dimension (vertical stacking) to shorten current paths and reduce ESL.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Volume of moving object

If capacitor size is reduced for miniaturization, then electronic product size decreases, but ESL increases and performance deteriorates

Engineering Contradiction:
Improvecapacitor sizeVSAvoidESL characteristics
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

By stacking multiple functional layers vertically, the patent achieves miniaturization in the horizontal plane while maintaining effective current paths in the vertical dimension. The internal electrodes extend through multiple insulating layers, creating short vertical current paths that reduce inductance despite the small overall component size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Different regions of the capacitor have specialized functions: the first internal electrodes provide one current path orientation, the second internal electrodes provide another orientation, and external electrodes are strategically positioned on the mounting surface. This local differentiation of electrode functions and positions optimizes current distribution and reduces ESL in the miniaturized structure.

Inventive Principle:
Principle #3Local quality

3Quantity of substance

If capacitance is increased for high-capacitance applications, then performance requirements are met, but ESL increases and deteriorates performance

Engineering Contradiction:
ImprovecapacitanceVSAvoidESL characteristics
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The capacitor uses multiple internal electrodes segmented into first and second sets with different orientations, creating multiple parallel capacitance elements. Each internal electrode pair forms a capacitance element, and their parallel arrangement increases total capacitance while the segmented structure maintains short current paths for low ESL.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple internal electrodes and insulating layers are merged into a single integrated multilayer structure. The first and second internal electrodes are combined with their respective insulating layers to form a unified capacitor assembly that achieves high capacitance through increased electrode area while maintaining low inductance through the integrated vertical stacking.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11094467B2Multilayer ceramic capacitor and board having the same
Publication Date: 2021.08.17 SAMSUNG ELECTRO MECHANICS CO LTD
  • US11094467B2 patent drawing
  • US11094467B2 patent drawing
  • US11094467B2 patent drawing

AI summary

A multilayer ceramic capacitor includes a ceramic body having a plurality of dielectric layers stacked therein, and first and second internal electrodes alternately disposed with at least one among the plurality of dielectric layers interposed therebetween. The first internal electrodes include first and second lead portions exposed to a mounting surface of the ceramic body, and disposed to be spaced apart from each other in a length direction of the ceramic body. The second internal electrodes include a third lead portion exposed to the mounting surface of the ceramic body, and disposed between the first and second lead portions in the length direction of the ceramic body.