Modular Capacitor Array for IC Package Power Delivery
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The miniaturization of semiconductor devices has made it challenging to find sufficient area on integrated circuit (IC) packages for decoupling capacitors, which are essential for stabilizing power supply and reducing impedance, due to the large area consumption of thick oxide transistors and the limitations imposed by keep-out zones for land-side capacitors.
Innovation Solution
A modular capacitor array is introduced, comprising a leadframe with conductive pads and capacitive elements, encapsulated with a material, which matches the pitch of ball grid array (BGA) conductive pads, allowing for uniform pitch and increased surface area on the package substrate without a keep-out zone, enabling more decoupling capacitors and improved power delivery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thick oxide transistors are used to form decoupling capacitors on the substrate, then decoupling capacitance is provided for the circuitry, but the substrate area consumed is excessively large
Solution Approach 1:
The patent moves decoupling capacitors from the substrate plane to the vertical dimension by placing them underneath the package substrate. This dimensional transition allows capacitors to be positioned in the third dimension (below the substrate) rather than competing for two-dimensional substrate area, thereby providing adequate decoupling capacitance without consuming valuable substrate real estate.
Solution Approach 2:
The patent embeds capacitors within the package structure by placing them underneath the substrate and enclosing them with encapsulation material. This nesting approach integrates the capacitors into the overall package architecture, allowing them to coexist with other package components without interfering with substrate area allocation for active circuitry.
2Reliability
If land-side capacitors are placed on the package substrate, then decoupling capacitance is provided, but a keep-out zone is created that reduces available surface area for solder balls and land-side components
Solution Approach 1:
Instead of placing capacitors on the land side of the substrate where they would interfere with solder ball placement, the patent inverts the approach by positioning capacitors on the opposite side - underneath the substrate. This inversion eliminates the conflict between capacitor placement and solder ball array configuration, allowing both to coexist without compromise.
Solution Approach 2:
The patent transitions capacitor placement from the two-dimensional substrate surface to the vertical dimension underneath the substrate. This dimensional change removes capacitors from the plane where solder balls and land-side components are positioned, thereby eliminating the need for keep-out zones and maximizing the utilization of substrate surface area for interconnection purposes.
3Quantity of substance
If the pitch of BGA conductive pads is reduced to increase I/O capacity, then more I/O connections are achieved, but the pitch uniformity is compromised due to capacitor placement constraints
Solution Approach 1:
By relocating capacitors to the dimension underneath the substrate, the patent removes the geometric constraints that previously forced non-uniform pitch patterns. This allows the BGA conductive pads to be arranged in a uniform grid pattern across the entire substrate surface, maximizing I/O capacity while maintaining consistent pitch dimensions for manufacturing precision.
Data Source
AI summary
Certain aspects of the present disclosure generally relate to a modular capacitor array, such as for an integrated circuit package, and methods for fabricating the same. One example integrated circuit package generally includes a package substrate, a semiconductor die disposed above the package substrate, and at least one modular capacitor array disposed below the package substrate. The modular capacitor array may be a pre-packaged array of capacitive elements, such as multi-layer ceramic capacitors (MLCCs).