Modular PLD Bus Controller Architecture for Scalable Data Transfer
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Solution Overview
Problem
Conventional programmable logic device (PLD) architectures face challenges in modularity, scalability, and re-usability due to complex interconnections and the need for application-specific modifications, which impact development costs and schedules.
Innovation Solution
A scalable and modular bus controller-based PLD architecture with a universal bus interface that allows for interchangeable PLD modules, controlled by a bus controller executing a set of instructions, facilitating plug-and-play functionality, scalability, and re-usability across various applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional PLD architectures use complex interconnections and application-specific modifications, then functionality can be achieved, but modularity and scalability deteriorate
Solution Approach 1:
The PLD architecture is segmented into independent modules (PLD modules 102a-102n) that can be individually selected and connected to a bus controller 104. Each module is a self-contained unit that interfaces through a standardized universal bus interface 106, eliminating the need for complex point-to-point interconnections between modules. This segmentation enables modular design while reducing overall system complexity.
Solution Approach 2:
A universal bus interface 106 is implemented between the bus controller 104 and all PLD modules 102a-102n, providing a standardized communication protocol and connection method. This universal interface allows different types of PLD modules to be interchangeably connected to the same bus controller without requiring application-specific modifications, thereby improving modularity and scalability while reducing design complexity.
2Adaptability or versatility
If conventional PLD architectures support multiple applications, then versatility is improved, but development costs and schedules worsen
Solution Approach 1:
The bus controller 104 and universal bus interface 106 are designed to be application-agnostic, supporting multiple different types of PLD modules through a standardized interface. This universality allows the same bus controller hardware to be reused across different applications by simply changing the connected PLD modules, significantly reducing development costs and schedules while improving re-usability.
Solution Approach 2:
The patent enables virtualization and copying of PLD module functions through the bus controller architecture. Multiple PLD modules can be connected to a single bus controller, and the system can dynamically allocate and replicate functional capabilities across different modules based on application requirements, reducing the need for dedicated hardware for each application.
3Adaptability or versatility
If a single bus controller supports multiple PLD modules, then scalability is improved, but data transfer complexity increases
Solution Approach 1:
The system segments data transfer operations into standardized transactions between the bus controller 104 and individual PLD modules 102a-102n through the universal bus interface 106. Each module can be independently addressed and controlled, allowing the bus controller to manage multiple modules through simple, repetitive transaction sequences rather than complex multi-module coordination protocols, thereby enabling scalability without proportionally increasing control complexity.
Data Source
AI summary
A bus controller-based page memory programmable logic device (PLD) architecture includes a plurality of PLD modules and a bus controller in signal communication with the plurality of PLD modules via a universal bus interface. Each PLD module include a PLD memory unit configured to store first data. The bus controller includes bus memory unit configured to store second data and includes a bus controller engine configured to sequentially execute a set of bus controller instructions. One or both of the first data and the second data is transferred between the bus controller and a target PLD module among the plurality of PLD modules in response to sequentially executing the set of bus controller instructions.