Delta-Sigma Modulator Folding Error Replication for Noise Downfolding
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Solution Overview
Problem
High-speed delta-sigma modulators face challenges in mitigating quantization noise downfolding due to non-ideal chopping effects, which degrades noise and spectral purity, especially in wideband applications, as conventional techniques like FIRDACs and RTZ switching are ineffective at high sampling rates and impractical to implement.
Innovation Solution
A system and method that replicates and cancels chopping folding errors in delta-sigma modulators through digital post-cancellation, where a replica of the folding error is extracted from the modulator output and subtracted to suppress in-band noise and interferers, using a digital chopper and filter to model frequency-dependent errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional techniques like FIRDACs and RTZ switching are used to mitigate quantization noise downfolding, then noise and spectral purity are improved, but these techniques become ineffective at high sampling rates and impractical to implement
Solution Approach 1:
The patent replaces conventional mechanical switching techniques (FIRDACs and RTZ switching) with a digital post-cancellation system that uses digital signal processing to replicate and subtract chopping folding errors. This substitution enables the system to maintain effectiveness at high sampling rates where conventional mechanical approaches fail.
Solution Approach 2:
The patent creates a digital replica of the chopping folding error signal and subtracts it from the modulator output. This copying approach allows the system to cancel the harmful quantization noise downfolding without requiring modification of the high-speed modulator itself, making it adaptable to high sampling rates.
2Measurement precision
If digital post-cancellation is used to replicate and cancel chopping folding errors, then spectral purity and noise robustness are improved, but system complexity increases
Solution Approach 1:
The patent introduces a digital post-cancellation system as an intermediary between the modulator output and the final output. This intermediary replicates the chopping folding errors and subtracts them, improving spectral purity without requiring changes to the core modulator architecture, thus managing complexity.
Solution Approach 2:
The patent separates the error cancellation function into a distinct digital post-processing stage, independent of the main modulator. This segmentation allows the complex error cancellation task to be handled separately, improving spectral purity while containing complexity in a dedicated module rather than throughout the entire system.
Data Source
AI summary
A system and method of replicating and cancelling chopping folding error in delta-sigma modulators. The modulator may include a loop filter coupled to a quantizer providing a digital signal, chopper circuitry that chops analog signals of the loop filter at a chopping frequency, and chopping folding error cancellation circuitry that replicates and cancels a chopping folding error of the chopper circuitry to provide a corrected digital signal. A digital chopper or multiplier chops the digital signal to provide a chopped digital signal, and the chopped digital signal is either amplified or multiplied by a gain value or digitally filtered to replicate the chopping folding error, which is then subtracted from the digital signal for correction. The timing and duty cycle of the chopping frequency may be adjusted. Timing and duty cycle adjustment may be calibrated along with the filtering.