Module-Less Nanosheet FET Layout for Short-Channel Scaling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The incessant downscaling of feature size in multi-gate devices such as FinFETs and gate-all-around (GAA) nanowire (NW)-FETs leads to short channel effects (SCEs), limiting their performance and causing reliability issues, especially as feature sizes approach 3 nm.
Innovation Solution
The semiconductor device incorporates nanosheet field effect transistors (NS-FETs) without the active area module, shallow trench isolation module, and gate module, utilizing a shared gate structure and dielectric material pillars to enhance scalability and reduce manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If multi-gate devices such as FinFETs and GAA NW-FETs are downscaled to reduce feature size, then device density and integration are improved, but short channel effects worsen and limit performance
Solution Approach 1:
The patent transitions from planar 2D channel structures to three-dimensional nanosheet structures with multiple horizontal channels stacked vertically. This dimensional change provides better gate control over the channel while maintaining scalability, enabling continued downscaling without severe short channel effects by utilizing the vertical stacking dimension rather than simply reducing lateral dimensions
2Reliability
If traditional modules (active area module, shallow trench isolation module, gate module) are included in the processing flow, then device performance is maintained, but manufacturing complexity and cost increase
Solution Approach 1:
The patent merges previously separate manufacturing modules (active area module, shallow trench isolation module, gate module) into an integrated process flow. The nanosheet formation process simultaneously creates the channel structure, isolation regions, and gate patterns in a unified sequence, reducing the total number of discrete modules and simplifying the overall manufacturing process while maintaining device performance
Solution Approach 2:
The nanosheet structure serves multiple functions simultaneously: it provides the semiconductor channel, defines the active area boundaries, and works with the shared gate structure to create both transistor functionality and isolation. This multi-functionality eliminates the need for separate dedicated modules for each function, reducing manufacturing complexity
Data Source
AI summary
A semiconductor device is provided including NS-FETs in which the active area module, the shallow trench isolation module and the gate module are eliminated from the processing of the semiconductor device. The elimination of these modules makes the overall process easier and aids in reducing the cost of manufacturing the semiconductor device.