Molded Die Stack Hybrid Bonding With Misalignment Tolerance
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Solution Overview
Problem
Challenges arise in implementing stacked die and wafer arrangements due to the need for extremely flat, smooth, and clean bonding surfaces, which is difficult to achieve with existing direct bonding or hybrid bonding techniques, especially when dies or wafers are misaligned during the bonding process.
Innovation Solution
The technique involves hybrid bonding of dies or wafers without adhesives, using conductive features like TSVs and metal-to-metal bonding, along with surface preparation methods like CMP to ensure flatness and smoothness, and applying molding to facilitate handling and thermal management, while allowing for misalignment in the stacking process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If direct bonding or hybrid bonding techniques are used to bond stacked dies or wafers, then electrical connection and mechanical strength are improved, but the requirement for extremely flat, smooth, and clean bonding surfaces increases manufacturing difficulty
Solution Approach 1:
The patent applies Chemical Mechanical Polishing (CMP) to the bonding surfaces of dies and wafers before stacking and bonding. This preliminary surface preparation ensures that the surfaces are extremely flat, smooth, and clean, meeting the stringent requirements for direct bonding and hybrid bonding techniques. By performing the surface preparation in advance, the patent eliminates the need for high-precision surface control during the bonding process itself, thereby improving bonding reliability while managing manufacturing precision requirements through a dedicated preprocessing step.
2Ease of manufacture
If adhesive materials are used to bond dies or wafers in stacked arrangements, then ease of assembly is improved, but thermal management capability deteriorates due to thermal resistance of the adhesive layer
Solution Approach 1:
The patent removes adhesive materials from the bonding interface between stacked dies and wafers. Instead of using adhesive layers that provide ease of assembly but introduce thermal resistance, the patent employs direct bonding and hybrid bonding techniques that create metal-to-metal bonds without any intervening adhesive material. This extraction of the adhesive layer eliminates the thermal barrier, allowing for efficient thermal management through direct thermal contact between bonding surfaces while still achieving strong mechanical bonding through the direct bonding process.
3Ease of manufacture
If misalignment is allowed in stacked die arrangements, then ease of assembly is improved, but interconnection reliability deteriorates due to misaligned conductive structures
Solution Approach 1:
The patent extends conductive interconnect structures in three-dimensional space using Through-Silicon Vias (TSVs) and other vertical interconnection methods. By adding the vertical dimension to interconnections, the patent creates redundant bonding paths that can accommodate lateral misalignment between stacked dies and wafers. The conductive structures are designed to extend beyond the immediate bonding interface, allowing misaligned conductive structures on one die to still make reliable contact with corresponding structures on adjacent dies through this extended three-dimensional interconnection geometry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables reliable bonding and efficient thermal management by forming continuous conductive interconnects between stacked devices, even with misaligned dies or wafers, and provides a robust packaging solution for microelectronic assemblies.
Implementation Method 1
the hybrid bonding technique adds direct metal-to-metal bonds of respective metallic bond pads at the bonding surfaces of the respective dies or wafers, also without an intervening material, forming unified conductive structures
Implementation Method 2
The direct dielectric bonding techniques include a spontaneous covalent bonding process that takes place at ambient conditions when two prepared dielectric surfaces are brought together, without adhesive or an intervening material
Implementation Method 3
Heated annealing of the metallic bond pads may be used to augment the metal-to-metal bonds
Implementation Method 4
The hybrid surface may be prepared for bonding with another die, wafer, or other substrate using a chemical mechanical polishing (CMP) process
Data Source
AI summary
Dies and/or wafers are stacked and bonded in various arrangements including stacks, and may be covered with a molding to facilitate handling, packaging, and the like. In various examples, the molding may cover more or less of a stack, to facilitate connectivity with the devices of the stack, to enhance thermal management, and so forth.