Molded Power Delivery Interconnect Module for High Current
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Solution Overview
Problem
Semiconductor chip packages with miniaturized interconnect geometry face challenges in current carrying capacity, posing functionality risks due to reduced die and/or package substrate footprint, which limits power delivery reliability.
Innovation Solution
A molded power delivery module with conductive structures, including input and reference conductive structures, is integrated into the semiconductor chip package, allowing for improved current carrying capacity and power delivery while maintaining a miniaturized form factor by using a mold substrate layer with exposed top and bottom conductive structures and encased sides, alternating reference conductive structures around input conductive structures to enhance electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If miniaturized interconnect geometry is used, then device footprint is reduced, but current carrying capacity is limited
Solution Approach 1:
The patent transitions from planar 2D interconnect geometry to a three-dimensional molded power delivery module with vertical conductive structures. The mold substrate layer creates elevated conductive paths that extend in the Z-direction, increasing interconnect volume and current carrying capacity without expanding the device footprint in the X-Y plane.
Solution Approach 2:
The conductive structures are embedded within the mold substrate layer, creating a nested configuration where conductive elements are contained within the substrate matrix. This nesting approach maximizes the use of available space within the miniaturized footprint while maintaining adequate current carrying capacity through the embedded three-dimensional conductive network.
2Area of stationary object
If reduced die and package substrate footprint is used, then device size is minimized, but power delivery reliability is compromised
Solution Approach 1:
The patent employs a composite structure consisting of the mold substrate layer combined with integrated conductive structures. This composite material approach creates a robust power delivery network that maintains reliability in miniaturized packages by providing mechanically stable and electrically conductive pathways within the composite mold substrate assembly.
3Ease of manufacture
If conventional power delivery structures are used, then manufacturing is simpler, but interconnect volume is insufficient for high current applications
Solution Approach 1:
The patent merges the substrate function with the interconnect function by integrating conductive structures directly into the mold substrate layer. This consolidation eliminates the need for separate substrate and interconnect components, simplifying manufacturing while simultaneously increasing interconnect volume through the three-dimensional embedded conductive network.
Data Source
AI summary
A semiconductor package including a molded power delivery module arranged between a package substrate and a semiconductor chip and including a plurality of input conductive structures and a plurality of reference conductive structures, wherein the input conductive structures alternate between the plurality of reference conductive structures, wherein the input conductive structure is electrically coupled with a chip input voltage terminal and a package input voltage terminal, wherein each of the plurality of reference conductive structures are electrically coupled with a semiconductor chip reference terminal and a package reference terminal.