Molded Substrate Cavity Insertion for Sensitive Semiconductor Dies

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Solution Overview

Problem

Conventional embedded wafer level ball grid array (eWLB) packaging technologies can mechanically and thermally damage sensitive semiconductor dies, and obstruct light emitting/sensing surfaces due to overmolding and redistribution processes, which are not suitable for temperature-sensitive or mechanically sensitive devices like MEMs and SAW filters.

Innovation Solution

A molded substrate is created with functional semiconductor dies and placeholders embedded in a molding compound, where the placeholders are thinned and removed to form cavities, allowing additional dies to be inserted and connected electrically without obstructing their top surfaces, thus avoiding high processing temperatures and preserving sensitive components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional eWLB overmolding process is used to package semiconductor dies, then the dies are protected and electrically connected, but temperature-sensitive and mechanically sensitive dies (MEMs, SAW filters) are damaged and light emitting/sensing surfaces are obstructed

Engineering Contradiction:
Improveprotection of semiconductor diesVSAvoidthermal damage and mechanical damage to sensitive dies
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies different treatment to different regions of the semiconductor package. The molding compound is removed only from specific areas where light emitting/sensing devices are located, while other areas remain covered for protection. This localized approach allows light to pass through to the active surfaces without exposing the entire die to the harmful effects of overmolding.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Instead of covering all surfaces with molding compound as in conventional eWLB, the patent inverts the approach by selectively removing the molding compound from specific regions. This inversion allows the light-emitting/sensing surfaces to remain exposed and functional while maintaining protection in other areas.

Inventive Principle:
Principle #13The other way round (Inversion)

2Strength

If molding compound is applied over all semiconductor dies in eWLB, then mechanical protection is provided, but light emitting/sensing surfaces are obstructed and cannot function

Engineering Contradiction:
Improvemechanical protection of diesVSAvoidlight emission and sensing capability
Core Design Contradiction:
StrengthVSIllumination intensity

Solution Approach 1:

The molding compound is selectively removed from regions corresponding to light emitting/sensing devices, creating localized openings that allow light to pass through. The rest of the package remains covered by the molding compound for mechanical protection, achieving both protection and optical functionality simultaneously.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If high processing temperatures are used in overmolding process, then the molding compound is properly formed and bonded, but temperature-sensitive semiconductor dies are damaged

Engineering Contradiction:
Improvemolding process formation and bondingVSAvoidthermal damage to temperature-sensitive dies
Core Design Contradiction:
Ease of manufactureVSTemperature

Solution Approach 1:

Light emitting/sensing devices are positioned and secured on the carrier substrate before the overmolding process. This preliminary placement allows these sensitive devices to be protected from thermal damage during the high-temperature molding process, while the molding compound is subsequently removed from their areas to restore functionality.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9487392B2Method of packaging integrated circuits and a molded package
Publication Date: 2016.11.08 INFINEON TECHNOLOGIES AG
  • US9487392B2 patent drawing
  • US9487392B2 patent drawing
  • US9487392B2 patent drawing

AI summary

A method of packaging integrated circuits includes providing a molded substrate that has a plurality of first semiconductor dies and a plurality of second semiconductor dies laterally spaced apart from one another and covered by a molding compound. The molding compound is thinned to expose at least some of the second semiconductor dies. The exposed second semiconductor dies are removed to form cavities in the molded substrate. A plurality of third semiconductor dies are inserted in the cavities formed in the molded substrate, and electrical connections are formed to the first semiconductor dies and to the third semiconductor dies.