Molecular Memory Cavity Design for Leakage Reduction
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Solution Overview
Problem
The miniaturization of conventional memory cells in NAND-type flash memory and other nonvolatile storage devices is limited by increased leakage current as they become smaller, which is undesirable for storage density and power consumption.
Innovation Solution
A molecular memory design featuring an insulating film with a cavity, a first conductive member exposed on the lower side, a second conductive member exposed on the upper side, and resistance varying-type molecular chains within the cavity, where the cavity is wider than the conductive members, reducing leakage current by lengthening the current path and minimizing contact between adjacent molecular chains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional memory cells are miniaturized to increase storage density, then storage density is improved, but leakage current increases
Solution Approach 1:
The patent transitions from planar 2D memory cell layout to a 3D vertical structure with insulating films stacked in multiple layers. Memory cells are formed at intersections of word lines and bit lines extending in different directions, utilizing spatial dimensionality to increase storage density without proportionally increasing leakage current, as each cell is isolated vertically by insulating layers
Solution Approach 2:
The patent divides the memory structure into discrete memory cells separated by insulating films (first and second insulating films) that segment the conductive members. This segmentation isolates adjacent memory cells, preventing leakage current from spreading between cells while maintaining high density through compact arrangement of segmented units
2Quantity of substance
If conventional memory cells are miniaturized, then storage density is improved, but power consumption increases due to leakage current
Solution Approach 1:
By stacking insulating films and conductive members in three dimensions, the patent achieves higher storage density in a smaller volume without the leakage current penalties of planar miniaturization, thereby reducing power consumption per unit of storage capacity
Solution Approach 2:
Insulating films are positioned between and around conductive members to preemptively block leakage current paths before they can form. This preventive insulation structure cushions against the inherent leakage problems of miniaturized memory cells, maintaining low power consumption at high density
3Quantity of substance
If memory cells are miniaturized, then storage density is improved, but interference between adjacent cells increases
Solution Approach 1:
The first and second insulating films segment adjacent memory cells, creating physical and electrical isolation barriers. This segmentation prevents parasitic capacitance and signal interference between closely spaced cells, enabling high-density storage without compromising signal integrity
Solution Approach 2:
Insulating films serve as intermediary layers between adjacent conductive members and memory cells. These intermediary structures electrically isolate neighboring cells while maintaining their proximity for high density, eliminating harmful electromagnetic interference and capacitive coupling
4Quantity of substance
If conventional memory cells are miniaturized, then storage density is improved, but manufacturing precision requirements increase due to lithographic limits
Solution Approach 1:
The patent moves from 2D lithographic patterning to 3D structure formation where insulating films are deposited and patterned in multiple layers. This vertical stacking approach achieves higher effective density without requiring proportionally smaller lateral feature sizes, relaxing lithographic precision requirements while maintaining high storage density
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves low leakage current, reducing power consumption and enabling higher storage density and faster operation by suppressing parasitic capacitance and interference between memory cells.
Implementation Method 1
The resistance varying-type molecular chains are molecules that have electrical resistance values which change when subjected to an input of an electric signal
Data Source
AI summary
A molecular memory device has an insulating film with a cavity, the cavity having an upper portion and a lower portion; a first conductive member with a portion exposed at the lower portion of the cavity; a second conductive member with a portion exposed at the upper portion of the cavity; and a resistance varying-type molecular chain disposed in the cavity and bonded with the first conductive member or the second conductive member. The cavity is wider than at least one of the first conductive member along a first direction and the second conductive member along a second direction.