Thin-Film Molecular Memory With Ferroelectric Spin-State Switching

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Solution Overview

Problem

Current nonvolatile memory technologies face challenges in achieving low-power, high-density, and fast switching speeds while maintaining nonvolatility and scalability, particularly in organic electronics and spintronic devices.

Innovation Solution

A thin film molecular memory system using voltage-controlled spin crossover complexes with a ferroelectric layer, enabling low coercive voltage, low write peak currents, and high on/off ratios, compatible with BEOL silicon processing, and suitable for flexible displays and cache memory applications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If conventional nonvolatile memory technologies are used, then nonvolatility is achieved, but power consumption is high and switching speeds are slow

Engineering Contradiction:
Improvepower consumptionVSAvoidswitching speed
Core Design Contradiction:
Use of energy by moving objectVSSpeed

Solution Approach 1:

The patent changes the fundamental operating parameters by using spin crossover complexes that undergo spin state transitions (low-spin to high-spin) triggered by voltage-controlled electric fields rather than traditional charge-based mechanisms. This parameter change enables simultaneous achievement of low power consumption (<1 fJ/device) and fast switching speeds (<100 ps) by exploiting the intrinsic magnetic properties and rapid transition kinetics of the molecular spin crossover material

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces traditional charge-based memory mechanisms with spin-based mechanisms. Instead of moving or trapping electrical charges, the system uses voltage-controlled spin state switching in molecular complexes, where the magnetic moment orientation serves as the memory state. This substitution eliminates the need for high current densities and large power consumption while achieving sub-100ps switching speeds through the rapid spin transition process

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Quantity of substance

If high-density memory is achieved, then storage capacity increases, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvestorage capacityVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent employs composite material structures combining ferroelectric layers with spin crossover molecular complexes. The ferroelectric material provides nonvolatile state retention through polarization, while the spin crossover complex provides rapid switching and low power operation. This composite approach achieves high storage density with simplified device architecture, as the combination of materials provides both nonvolatility and fast switching in a single integrated structure compatible with BEOL silicon processing

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent transitions from planar two-dimensional memory structures to three-dimensional vertical stacking architectures. By stacking multiple layers of ferroelectric and spin crossover materials vertically, the system achieves high storage density without increasing lateral device footprint or complexity. The vertical dimension allows for scalable integration with existing silicon technology while maintaining simple planar device footprints

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Speed

If fast switching speeds are achieved, then memory speed improves, but energy consumption increases

Engineering Contradiction:
Improveswitching speedVSAvoidenergy consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent utilizes periodic oscillating electric fields applied through the ferroelectric layer to trigger spin state transitions in the molecular complexes. The ferroelectric polarization oscillates between positive and negative states, inducing corresponding spin state changes in the adjacent spin crossover layer. This periodic action enables sub-100ps switching speeds while consuming minimal energy (<1 fJ/device) because the ferroelectric field provides the driving force without requiring continuous high current flow

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The system achieves nonvolatile memory operations with low energy consumption (<1 fJ/device), fast switching speeds (<100 ps), and high endurance (over 10^11 switches) while being scalable and compatible with silicon technology, potentially replacing existing RAM technologies.

Implementation Method 1

a ferroelectric layer adjacent to a spin crossover molecular layer

Methodology Applied
Scientific EffectFerroelectric effect: Ferrofluid

Implementation Method 2

spin crossover molecular layer having a channel thickness of at least 10 nm

Methodology Applied
Scientific EffectSpin crossover:

Data Source

PatentUS12063788B2Thin film molecular memory
Publication Date: 2024.08.13 NUTECH VENTURES LTD
  • US12063788B2 patent drawing
  • US12063788B2 patent drawing
  • US12063788B2 patent drawing

AI summary

A thin film molecular memory is provided that satisfies criteria needed to make a molecular spintronic device, based on spin crossover complexes, competitive with silicon technology. These criteria include, device implementation, a low coercive voltage (less than 1V) and low write peak currents (on the order of 104 A/cm2), a device on/off ratio &gt;10, thin film quality, the ability to “lock” the spin state (providing nonvolatility), the ability to isothermally “unlock” and switch the spin state with voltage, conductance change with spin state, room temperature and above room temperature operation, an on-state device resistivity less than 1 Ω·cm, a device fast switching speed (less than 100 ps), device endurance (on the order of 1016 switches without degradation), and the ability of having a device with a transistor channel width of 10 nm or below.