MOM Capacitor Orthogonal Endcap Design for Alignment Variance
Solution Overview
Problem
Metal-oxide-metal (MOM) capacitors in mobile RF transceivers face misalignment issues during fabrication, leading to capacitance variance, which affects RF performance and is unpredictable due to double patterning processes in advanced semiconductor processes.
Innovation Solution
The design involves a capacitor structure with orthogonal and interdigitated conductive fingers across multiple interconnect layers, fabricated using specific masks to minimize misalignment and variance, achieving reduced capacitance variance by half compared to conventional implementations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional MOM capacitor fabrication is used, then manufacturing simplicity is maintained, but misalignment occurs during double patterning lithography leading to capacitance variance
Solution Approach 1:
The capacitor structure employs asymmetric endcap designs where the first endcap has a first section and a second section orthogonal to each other, while the second endcap has corresponding sections positioned at different locations. This asymmetric configuration creates interdigitated finger patterns that are inherently more tolerant to fabrication misalignment, reducing capacitance variance without requiring additional process steps
Solution Approach 2:
The capacitor plates are segmented into multiple interdigitated fingers formed by conductive layers. This segmentation into first and second sets of conductive fingers with orthogonal coupling allows the structure to maintain capacitance stability despite misalignment, as the distributed finger configuration averages out local alignment variations
2Reliability
If double patterning lithography is used for fabrication, then advanced process node compatibility is achieved, but misalignment and capacitance variance increase
Solution Approach 1:
The capacitor design incorporates geometric configurations that preemptively compensate for expected misalignment effects. The orthogonal coupling between endcap sections and interdigitated fingers creates a structure where capacitance is less sensitive to alignment variations, cushioning against the inherent precision limitations of double patterning lithography
Solution Approach 2:
The invention changes the geometric parameters of the capacitor structure by implementing orthogonal coupling between endcap sections and creating interdigitated finger patterns. These parameter changes transform the capacitance calculation from being highly sensitive to alignment to being more robust, maintaining reliability despite manufacturing variations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a capacitor with significantly reduced capacitance variance, improving RF performance and matching simulation models more closely, while maintaining the same probability of variance occurrence, thus enhancing the reliability and efficiency of MOM capacitors.
Implementation Method 1
MOM capacitors harness lateral capacitive coupling between plates formed by metallization layers and wiring traces
Implementation Method 2
MOM capacitor structures realize capacitance by using the fringing capacitance produced by sets of interdigitated fingers
Data Source
AI summary
A capacitor has reduced misalignment in the interconnect layers and lower capacitance variance. The capacitor includes a first endcap having a first section and a second section orthogonal to the first section. The capacitor includes a first set of conductive fingers orthogonally coupled to the first section. The capacitor includes a third set of conductive fingers orthogonally coupled to the second section of the endcap and a second endcap parallel to the first section of the endcap. The capacitor includes a second set of conductive fingers orthogonally coupled to a second endcap and interdigitated with the first set of conductive fingers at a first interconnect layer. The capacitor includes a third endcap parallel to the second section of the first endcap and a fourth set of conductive fingers orthogonally coupled to the third endcap and interdigitated with the third set of conductive fingers at the first interconnect layer.