Mono-crystalline Non-volatile Memory Floating Gate Structure

Solution Overview

Problem

The existing manufacturing process for non-volatile memory devices, such as EEPROM or flash memory, faces challenges in accurately controlling the characteristics of floating gate, second dielectric, and control gate layers due to high defect densities and charge carrier traps in polycrystalline or amorphous layers, affecting the operation and reading accuracy of memory cells.

Innovation Solution

The method involves forming non-volatile memory devices on a mono-crystalline substrate with a control gate layer deposited directly or on epitaxial sacrificial layers, creating a space between the control gate and substrate, and filling it with a stack of dielectric and floating gate layers to achieve precise control and reduce defects, using techniques like selective etching and atomic layer deposition to form high-quality dielectric layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If dielectric layers are deposited on polycrystalline or amorphous layers, then the manufacturing process is simpler, but the density of defects and charge carrier traps increases

Engineering Contradiction:

Improvemanufacturing process simplicityVSAvoiddefect density

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the substrate parameter from polycrystalline or amorphous to mono-crystalline, fundamentally altering the material structure to reduce defect density and charge carrier traps while maintaining manufacturing feasibility through selective etching and epitaxial growth techniques

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent uses a sacrificial layer that is replicated or copied in structure (mono-crystalline silicon layer) to create the desired geometry after removal, allowing precise control of the floating gate structure while maintaining manufacturing simplicity

Inventive Principle:

Principle #26Copying

2Ease of manufacture

If dielectric layers are deposited on polycrystalline or amorphous layers, then the manufacturing process is simpler, but the control accuracy of floating gate and control gate layer characteristics deteriorates

Engineering Contradiction:

Improvemanufacturing process simplicityVSAvoidcontrol accuracy of layer characteristics

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent changes the substrate parameter from polycrystalline or amorphous to mono-crystalline, fundamentally altering the material structure to reduce defect density and charge carrier traps while maintaining manufacturing feasibility through selective etching and epitaxial growth techniques

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent performs preliminary actions by forming a mono-crystalline sacrificial layer and epitaxial layers before final structure formation, ensuring high-quality interfaces and precise control of layer characteristics are established early in the manufacturing process

Inventive Principle:

Principle #10Preliminary action

3Ease of manufacture

If conventional dielectric deposition is used, then the process is simpler, but charge carrier traps distort memory cell operation and reading accuracy

Engineering Contradiction:

Improveprocess simplicityVSAvoidreading accuracy

Core Design Contradiction:

Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent changes the substrate parameter from polycrystalline or amorphous to mono-crystalline, fundamentally altering the material structure to reduce defect density and charge carrier traps while maintaining manufacturing feasibility through selective etching and epitaxial growth techniques

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent uses a sacrificial layer that is replicated or copied in structure (mono-crystalline silicon layer) to create the desired geometry after removal, allowing precise control of the floating gate structure while maintaining manufacturing simplicity

Inventive Principle:

Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for accurate control of the floating gate and control gate layers, reducing defects and charge traps, thereby enhancing the reliability and accuracy of memory cell operations by providing a high-quality dielectric interface.

Implementation Method 1

depositing a floating gate layer of polycrystalline silicon on the dielectric layer

Methodology Applied

Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

forming non-volatile memory devices on a mono-crystalline substrate with a control gate layer deposited directly or on epitaxial sacrificial layers

Methodology Applied

Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS8377793B2Method for manufacturing a non-volatile memory, non-volatile memory device, and an integrated circuit

Publication Date: 2013.02.19 NXP USA INC

AI summary

A method of manufacturing a non-volatile memory device, including providing at least one control gate layer on a substrate. A passage may be created between the at least one control gate layer and the substrate. In the passage at least one filling layer may be provided. A floating gate structure including the filling layer may be formed, as well as a control gate structure including the at least one control gate layer, the control gate structure being in a stacked configuration with the floating gate structure.