Monolithic Acoustic Device Architecture for CMOS Compatibility
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional monolithic integrated devices face complexity and compatibility issues between acoustic and CMOS devices, leading to trade-offs in functionality.
Innovation Solution
A monolithic integrated device architecture that embeds the acoustic device within the electronic circuitry using metal layers as electrodes, allowing for the transduction of both surface and bulk acoustic waves, and enabling electronic disconnection for passive operation without a passivation layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the acoustic device is built on top of the electronic circuitry using conventional monolithic integration, then the acoustic device functionality is achieved, but complexity and compatibility issues arise between acoustic and CMOS devices
Solution Approach 1:
The patent merges the acoustic device and electronic circuitry into a single monolithic structure where the acoustic device is formed within the inter-layer dielectric of the CMOS device. The metal layers of the electronic circuitry are shared to serve as electrodes for the acoustic device, combining both functionalities into one integrated structure without requiring separate mounting or additional interconnect layers.
Solution Approach 2:
The metal layers of the electronic circuitry serve dual purposes: they function as conductive interconnects for the CMOS device and simultaneously serve as electrodes for the acoustic device. This multi-functionality eliminates the need for dedicated electrode structures and reduces overall device complexity while enhancing compatibility between the acoustic and electronic components.
2Area of stationary object
If the acoustic device is laterally integrated with electronic circuitry, then device size is reduced, but interconnect parasitics increase
Solution Approach 1:
The patent transitions from lateral integration to vertical integration by forming the acoustic device within the inter-layer dielectric above the substrate. This three-dimensional arrangement places the acoustic device in a different spatial dimension relative to the electronic circuitry, minimizing interconnect path lengths and reducing parasitic effects while maintaining compact device footprint.
Solution Approach 2:
The acoustic device is nested within the inter-layer dielectric structure of the CMOS device, with the piezoelectric layer and electrodes embedded between existing metal layers. This nesting approach allows both devices to coexist in a compact volume while utilizing shared structural elements, thereby reducing overall device area without increasing interconnect complexity.
3Reliability
If a passivation layer is used to protect the electronic circuitry, then device protection is improved, but integration of the acoustic device becomes more complex
Solution Approach 1:
The patent extracts the acoustic device formation process from the traditional post-passivation approach and integrates it within the inter-layer dielectric deposition and patterning steps. By taking out the acoustic device fabrication and embedding it during the existing CMOS manufacturing sequence, the need for additional passivation layers or post-processing steps is eliminated, reducing integration complexity while maintaining protection.
Solution Approach 2:
The acoustic device is formed preliminarily within the inter-layer dielectric before final device completion. The piezoelectric layer and electrodes are deposited and patterned during the inter-layer dielectric processing stage, allowing subsequent manufacturing steps to proceed without additional protection layers. This preliminary action ensures both devices are protected by the existing dielectric structure without requiring separate passivation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This architecture reduces interconnect parasitics, enhances compatibility, and simplifies component arrangement while maintaining acoustic device functionality, allowing for efficient signal transmission and reduced device size.
Implementation Method 1
a piezoelectric layer being sandwiched between a top electrode and a bottom electrode within the inter-layer dielectric
Implementation Method 2
enables the transduction of either the bulk acoustic waves or surface acoustic waves
Implementation Method 3
enables the transduction of either the bulk acoustic waves or surface acoustic waves
Data Source
AI summary
Monolithic integrated device having an architecture that allows an acoustic device to transduce either surface acoustic waves or bulk acoustic waves, comprising: a substrate layer being the base of the device; an inter-layer dielectric disposed on top of the substrate layer; an electronic circuitry substantially formed in the inter-layer dielectric and supported by the substrate layer, the electronic circuitry comprises a plurality of metal layers; and a piezoelectric layer being sandwiched between a top electrode and a bottom electrode within the inter-layer dielectric. The top electrode is an upper metal layer belonging to the electronic circuitry and the bottom electrode is a lower metal layer belonging to the electronic circuitry. To transduce the bulk acoustic waves, the inter-layer dielectric is formed with a top cavity above the top electrode and a bottom cavity below the bottom electrode.