Monolithic Via Wiring Structure for High-Density Semiconductor Substrates
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Solution Overview
Problem
The increasing number of input/output (I/O) connections in semiconductor chips leads to larger and thicker semiconductor substrates, resulting in decreased yield and warpage issues, which further reduce manufacturing efficiency.
Innovation Solution
A wiring structure with a monolithic conductive through via that extends through multiple dielectric and circuit layers, allowing for a high-density circuit layer with finer pitch and lower thickness, while maintaining a low manufacturing cost and improved yield by separating the warpage of the upper and lower conductive structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of I/O connections is increased, then the electrical performance and functions are improved, but the substrate size and thickness increase leading to warpage and yield decrease
Solution Approach 1:
The substrate is divided into multiple layers (first substrate, second substrate, third substrate) with circuit layers distributed across these layers. This segmentation allows increasing I/O connections without proportionally increasing the thickness of a single substrate, thereby reducing warpage while maintaining high connectivity.
Solution Approach 2:
Circuit layers are arranged in multiple dimensions across different substrate layers rather than being confined to a single plane. This multi-dimensional arrangement increases the effective connection capacity without linearly increasing the substrate footprint or thickness, solving the warpage-yield contradiction.
2Adaptability or versatility
If the substrate thickness is increased to accommodate more circuit layers, then more I/O connections are achieved, but warpage increases and manufacturing yield decreases
Solution Approach 1:
The thick substrate is segmented into multiple thinner substrate layers (first, second, third substrates) bonded together. This segmentation reduces the effective thickness of individual layers, minimizing warpage while collectively providing the capacity for numerous I/O connections through distributed circuit layers.
Solution Approach 2:
Multiple circuit layers and substrate layers are nested within each other in a compact configuration. The circuit layers are embedded within and between substrate layers, creating a dense, space-efficient structure that achieves high I/O capacity without excessive overall thickness.
3Quantity of substance
If the circuit layer pitch is reduced to increase density, then more connections are achieved, but manufacturing precision requirements increase
Solution Approach 1:
The high-density circuit connections are segmented across multiple substrate layers rather than being concentrated in a single layer. This allows each layer to have moderate pitch requirements while achieving overall high connection density through the vertical distribution of circuit layers, reducing the manufacturing precision burden on any single layer.
Data Source
AI summary
A wiring structure and a method for manufacturing the same are provided. The wiring structure includes a conductive structure and at least one conductive through via. The conductive structure includes a plurality of dielectric layers and a plurality of circuit layers in contact with the dielectric layers. The conductive through via extends through the conductive structure. The conductive through via is a monolithic structure, and includes a main portion and an extending portion protruding from the main portion.