MONOS Gate Spacer Sidewall Etching for Void-Free Filling
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Solution Overview
Problem
The fabrication of semiconductor devices with high aspect ratio regions often results in voids filled with unwanted conductive materials, leading to defects and reduced reliability, particularly in MONOS and SRAM devices where precise control is crucial for advanced performance.
Innovation Solution
A method is developed to selectively mask and etch regions with high aspect ratios in semiconductor devices, using a photoresist material to pattern and remove sidewall portions of oxide layers, followed by forming a contact etching stop layer and interlayer dielectric to fill regions without voids, ensuring precise filling and reducing defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional fabrication methods are used for high aspect ratio regions, then manufacturing process is simple, but voids filled with unwanted conductive materials occur leading to defects
Solution Approach 1:
The method performs preliminary actions by selectively masking certain regions before the filling process, and etching sidewall portions of oxide layers in advance. This prepares the high aspect ratio regions to receive filling material properly, preventing void formation and ensuring reliable device operation.
Solution Approach 2:
The patent introduces intermediary steps including selective masking and sidewall etching that mediate between the conventional fabrication process and the final filling operation. These intermediary actions modify the region geometry and surface properties to enable successful material deposition without voids.
2Manufacturing precision
If selective masking and etching steps are added, then filling precision improves and voids are prevented, but device complexity increases
Solution Approach 1:
The method applies local quality by selectively masking only specific regions that require precise filling, rather than treating the entire wafer uniformly. The sidewall etching is also applied locally to specific oxide layer portions. This targeted approach improves filling precision in critical areas while minimizing the impact on overall process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents voids and defects in high aspect ratio regions, enhancing the reliability and performance of semiconductor devices like MONOS and SRAM by ensuring accurate filling and reducing unwanted material deposition.
Implementation Method 1
a photoresist material to pattern and remove sidewall portions of oxide layers
Implementation Method 2
etching the sidewall portions of the oxide layer in the unmasked at least one region
Data Source
AI summary
A method for fabricating a semiconductor device is provided. The method includes forming a plurality of gate structures having asymmetric sidewalls including a tall side and a short side. Adjacent ones of the plurality of gate structures are separated by a tall side-tall side region and a short side-short side region. The method further comprises forming a spacer layer over the plurality of gate structures and a bottom surface of the tall side-tall side region and the short side-short side region, depositing an oxide layer over the spacer layer, etching the bottom surface portions of the oxide layer, and selectively etching the sidewall portions of the oxide layer in the tall side-tall side region.