Split Gate MONOS Memory Dummy Electrode Removal
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Solution Overview
Problem
In the production of split gate type MONOS memory semiconductor devices, ion implantation introduces impurities into non-crystalline memory gate electrodes, leading to variations in crystal shape and charge holding properties, making it difficult to form reliable LDD structures and deteriorating memory cell performance.
Innovation Solution
A method involving the formation of dummy memory gate electrodes, followed by ion implantation to create diffusion regions, removal of the dummy electrodes, and subsequent formation of memory gate electrodes and ONO films, ensuring consistent gate lengths and preventing impurity ion damage to the ONO film, thereby improving the reliability of the semiconductor device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If ion implantation is performed across non-crystalline memory gate electrodes to form diffusion regions, then source/drain regions can be formed, but impurity ions are introduced into the memory gate electrodes causing crystal grain shape variations and property variations between electrodes
Solution Approach 1:
The gate structure is divided into two separate parts: dummy memory gate electrodes used only for ion implantation masking, and actual memory gate electrodes that remain pure. This segmentation allows the dummy electrodes to be removed after serving their masking purpose, preventing impurity contamination of the functional memory gate electrodes while still enabling source/drain region formation.
Solution Approach 2:
The dummy memory gate electrodes are extracted from the final device structure after serving their temporary purpose as masks during ion implantation. By removing these dummy electrodes, the harmful impurity introduction into the functional memory gate electrodes is eliminated, while the source/drain regions are successfully formed.
2Ease of manufacture
If ion implantation is performed across memory gate electrodes, then diffusion regions can be formed, but the ONO film is damaged and charge holding property deteriorates
Solution Approach 1:
Dummy memory gate electrodes serve as intermediary masking structures during ion implantation. These dummy electrodes protect the ONO film and actual memory gate electrodes from direct ion bombardment by acting as sacrificial masks, allowing diffusion region formation while preventing damage to the charge-holding ONO film structure.
3Ease of manufacture
If dummy memory gate electrodes and memory gate electrodes are formed to have substantially the same gate length, then process alignment is simplified, but it becomes difficult to form LDD structures and cut-off characteristic deteriorates
Solution Approach 1:
The dummy memory gate electrodes are formed with extended gate lengths that protrude beyond the actual memory gate electrodes. This preliminary design allows the dummy electrodes to serve as masks for forming diffusion regions that extend into LDD structures, while the actual memory gate electrodes maintain their proper dimensions for optimal device performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of semiconductor devices by maintaining consistent memory cell properties and preventing damage to the ONO film, allowing for the formation of effective LDD structures and improved cut-off characteristics, thus improving the overall performance and reliability of the semiconductor device.
Implementation Method 1
implanting ions thereinto for forming diffusion regions
Data Source
AI summary
An improvement is made in the reliability of a semiconductor device having a split gate type MONOS memory. An ONO film covering a control gate electrode, and a dummy memory electrode gates are formed, and then a diffusion region on a source-region-side of a memory to produced is formed across the dummy memory electrode gates. Subsequently, the dummy memory electrode gates is removed, and then a memory gate electrode is formed which is smaller in gate length than the dummy memory electrode gates. Thereafter, an extension region on the source-region-side of the memory is formed.