MONOS Memory Gate Alignment via Substrate Recess and Stepwise Etching
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Solution Overview
Problem
In split gate type MONOS memory devices, the region for charge injection during write operations often does not overlap with the region for charge release during erase operations, leading to deterioration in data rewrite efficiency and retention characteristics, especially with the miniaturization of semiconductor devices making it difficult to accurately form photoresist films above control gate electrodes.
Innovation Solution
A method of manufacturing semiconductor devices involves forming a control gate electrode through stepwise processing of a polysilicon film using two etching steps, creating a recess in the semiconductor substrate to ensure accurate positioning of the memory gate electrode relative to the control gate electrode, and filling this recess with an insulating film containing a charge retention portion, thereby improving the overlap of write and erase regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the photoresist film formation is stopped at a position right above the control gate electrode to form a recess, then the memory gate electrode can be positioned deeper than the control gate electrode, but with miniaturization and reduced gate length, it becomes difficult to stop photoresist film formation accurately, increasing defect proportion and deteriorating reliability
Solution Approach 1:
A marker pattern is introduced as an intermediary reference feature between the photomask alignment system and the control gate electrode. This marker pattern provides a visible, measurable reference that enables accurate positioning of the photoresist film relative to the control gate electrode, eliminating the difficulty of direct alignment and allowing precise formation of the recess structure even with miniaturized gate lengths
Solution Approach 2:
The marker pattern is formed in advance before the photoresist film formation step. This preliminary action establishes a reference framework that guides subsequent processing steps, ensuring that the recess can be formed at the correct position without requiring high-precision direct alignment during the critical photoresist application step
2Reliability
If the trapping insulating film and memory gate electrode are formed deeper than the control gate electrode to prevent punch-through deterioration, then charge injection and release regions can overlap, but this requires complex stepwise processing including etching the polysilicon film and forming recesses
Solution Approach 1:
The manufacturing process is segmented into distinct sequential steps: first forming the control gate electrode structure, then using a marker pattern to guide the formation of the recess, and finally forming the memory gate electrode at the desired depth. This segmentation transforms a complex single-step process into manageable discrete steps, each with clear objectives and reference points, reducing overall process complexity
Data Source
AI summary
An object is to provide a reliability-improved semiconductor device having a MONOS memory that rewrites data by injecting carriers into a charge storage portion. When a memory gate electrode having a small gate length is formed in order to overlap a carrier injection position in write operation with that in erase operation, each into an ONO film including a charge storage portion, the ONO film is formed in a recess of a main surface of a semiconductor substrate for securing a large channel length. In a step of manufacturing this structure, control gate electrodes are formed by stepwise processing of a polysilicon film by first and second etching and then, the recess is formed in the main surface of the semiconductor substrate on one side of the control gate electrode by second etching.