Selective Nitrogen Ion Implantation for MONOS Transistor Retention
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Solution Overview
Problem
The introduction of nitrogen into the gate insulating film of a MONOS type transistor can lead to changes or deterioration in the properties of adjacent MISFETs, affecting the reliability of semiconductor devices.
Innovation Solution
A method of manufacturing a semiconductor device where nitrogen is selectively introduced into the channel region of a specific MISFET using ion implantation, while avoiding other regions to prevent property changes in adjacent transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If nitrogen is introduced into the gate insulating film of a MONOS type transistor to improve retention properties, then the non-volatile memory cell property is improved, but the properties of adjacent MISFETs are changed or deteriorated
Solution Approach 1:
The patent applies local quality by forming a nitrogen-introduction portion that selectively introduces nitrogen into specific regions (MONOS transistor gate insulating film) while avoiding other regions (adjacent MISFET gate insulating films). This is achieved through selective ion implantation processes that target only the intended areas, ensuring that nitrogen is concentrated where needed for retention improvement while preventing nitrogen contamination in adjacent transistor regions that would cause property deterioration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the reliability of the semiconductor device by enhancing the retention properties of the memory transistor without causing deterioration in adjacent transistors, thus maintaining the integrity of both the memory and other MISFETs.
Implementation Method 1
a step of forming a nitrogen-introduction portion inside the first channel region by ion implantation of nitrogen using the first resist pattern as a mask
Data Source
AI summary
Reliability of a semiconductor device is improved. A resist pattern having an opening in a first region where a memory transistor is formed and covering other regions is prepared. Next, by ion implantation using this resist pattern as a mask, a channel region is formed in a surface of a semiconductor substrate in the first region, and a nitrogen-introduction portion is formed inside the channel region. Next, the resist pattern is removed. Then, a gate insulating film having a charge storage layer is formed on the semiconductor substrate in the first region, and a gate electrode is formed on the gate insulating film.