Montgomery Multiplication Unit for Cryptographic Processing Speed

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Solution Overview

Problem

Current computer systems face inefficiencies in performing modular exponentiation operations, particularly in cryptographic tasks, due to slow software implementations and the need for frequent operating system intervention, which affects processing speed and increases resource usage.

Innovation Solution

A microprocessor apparatus and method that includes a dedicated Montgomery multiplication unit and instruction, allowing for the generation of Montgomery products through a single atomic instruction, reducing the need for operating system intervention and enhancing processing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If software implementation of modular exponentiation is used, then device complexity is reduced, but processing speed deteriorates

Engineering Contradiction:
Improveprocessing speedVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent extracts the modular exponentiation function from general software implementation and creates a dedicated hardware unit (Montgomery multiplication unit) specifically for this cryptographic operation. This separation allows the specialized hardware to achieve high processing speed while the overall system complexity remains manageable through modular design.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediary hardware component (Montgomery multiplication unit) between the processor and the cryptographic operation. This intermediary unit handles the computationally intensive modular exponentiation tasks, enabling fast processing without requiring the main processor to be overly complex.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If frequent operating system intervention is required, then device complexity is reduced, but productivity deteriorates

Engineering Contradiction:
ImproveproductivityVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The Montgomery multiplication unit is designed as a self-contained hardware accelerator that can perform modular exponentiation operations independently without requiring frequent intervention from the operating system or main processor. This self-service capability enables continuous high-speed cryptographic processing, significantly improving productivity.

Inventive Principle:
Principle #25Self-service

3Speed

If modular exponentiation operations are performed rapidly, then processing speed is improved, but resource usage increases

Engineering Contradiction:
Improveprocessing speedVSAvoidresource usage
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent segments the cryptographic processing workload by creating a dedicated Montgomery multiplication unit that handles modular exponentiation separately from general processor tasks. This segmentation allows rapid processing of cryptographic operations while containing resource consumption to a specialized unit rather than consuming system-wide resources.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7664810B2Microprocessor apparatus and method for modular exponentiation
Publication Date: 2010.02.16 VIA TECH INC
  • US7664810B2 patent drawing
  • US7664810B2 patent drawing
  • US7664810B2 patent drawing

AI summary

A technique is provided for performing modular multiplication. In one embodiment, an apparatus in a microprocessor is provided for accomplishing modular multiplication operations. The apparatus includes translation logic and execution logic. The translation logic receives an atomic Montgomery multiplication instruction from a source therefrom, where the atomic Montgomery multiplication instruction prescribes generation of a Montgomery product. The translation logic translates the atomic Montgomery multiplication instruction into a sequence of micro instructions specifying sub-operations required to accomplish generation of the Montgomery product. The execution logic is operatively coupled to the translation logic. The execution logic receives the sequence of micro instructions, and performs the sub-operations to generate the Montgomery product.