High-Voltage MOS Dummy Diffusion Field Shifting
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Solution Overview
Problem
Current high-voltage MOS transistors face challenges in increasing breakdown voltage without reducing saturation drain current or increasing chip size, as reducing dopant concentration or increasing distance between drain and gate electrode either compromises saturation drain current or consumes more chip real estate.
Innovation Solution
The introduction of a high-voltage metal-oxide-semiconductor (MOS) device design featuring a semiconductor substrate with a drift ion well, isolation regions, and dummy diffusion regions, which laterally shifts the highest electric field away from the channel region, thereby enhancing breakdown voltage and saturation drain current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the dopant concentration of the N type drift ion wells is reduced to increase breakdown voltage, then the breakdown voltage is improved, but the saturation drain current decreases
Solution Approach 1:
The patent applies local quality by creating asymmetric doping regions: a first dummy diffusion region with the second conductivity type is formed adjacent to the drain, while a second dummy diffusion region with the first conductivity type is formed at the periphery. This localized doping strategy modifies the electric field distribution specifically in critical areas without uniformly reducing dopant concentration throughout the drift region, thereby maintaining saturation drain current while improving breakdown voltage.
Solution Approach 2:
The patent changes the doping parameters by introducing dummy diffusion regions with specific conductivity types at strategic locations. The first dummy diffusion region uses the second conductivity type adjacent to the drain, and the second dummy diffusion region uses the first conductivity type at the periphery. This parameter change in local doping concentrations and types creates favorable electric field distribution that resolves the contradiction between breakdown voltage and saturation drain current.
2Reliability
If the distance between the drain and gate electrode is increased to increase breakdown voltage, then the breakdown voltage is improved, but the chip area increases
Solution Approach 1:
The patent applies local quality by concentrating doping modifications in specific local regions rather than increasing overall device dimensions. The first dummy diffusion region adjacent to the drain and the second dummy diffusion region at the periphery create localized electric field modifications that enhance breakdown voltage without requiring increased spacing between drain and gate electrode, thus maintaining compact chip area.
3Reliability
If the dopant concentration of the N+ source/drain region is reduced to increase breakdown voltage, then the breakdown voltage is improved, but the saturation drain current decreases
Solution Approach 1:
The patent applies local quality by introducing dummy diffusion regions with specific conductivity types at strategic locations rather than uniformly reducing dopant concentration. The first dummy diffusion region with the second conductivity type adjacent to the drain and the second dummy diffusion region with the first conductivity type at the periphery create localized modifications that improve breakdown voltage while preserving the high dopant concentration needed for saturation drain current in the source/drain regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively increases breakdown voltage to 68-69V and shifts the highest electric field, improving saturation drain current while maintaining chip size, by incorporating dummy diffusion and STI regions to isolate the drain and gate electrodes.
Implementation Method 1
laterally shifts the highest electric field away from the channel region, thereby enhancing breakdown voltage
Implementation Method 2
a drift ion well of a second conductivity type formed in the semiconductor substrate
Data Source
AI summary
A high-voltage MOS device includes a substrate; a drift ion well formed in the substrate; a first isolation region formed in the drift ion well; a gate electrode formed on the substrate and covering a portion of the first isolation region; a drain doping region disposed adjacent to the first isolation region on an opposite side to the gate electrode; a second isolation region formed in the drift ion well, the second isolation region being disposed adjacent to the drain doping region on an opposite side to the first isolation region; and a first dummy diffusion region in the drift ion well, the dummy diffusion region being disposed at a side of the second isolation region opposite to the drain doping region.