Metal Oxide Semiconductor Memory Circuit Low Power Writing
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Solution Overview
Problem
Current memory elements, such as eFUSE and insulating film breakdown type elements, face challenges in achieving high-density circuit integration due to high current and voltage requirements, leading to increased chip size and power consumption in non-volatile storage devices.
Innovation Solution
A memory circuit utilizing a metal oxide semiconductor transistor with a channel region that transitions between two states, allowing for low-power writing with small currents and low voltages, using a structure with a source, drain, and gate electrodes, and an oxygen absorption layer to stabilize the resistance state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If eFUSE or insulating film breakdown type memory elements are used, then non-volatile data storage is achieved, but high current and voltage requirements increase chip size and power consumption
Solution Approach 1:
The patent changes the operating parameters of the memory element from high voltage/current breakdown mechanisms to low voltage/current resistance switching mechanisms. The memory element uses a variable resistance body that can switch between high and low resistance states through application of voltage, enabling non-volatile storage without the high power consumption of traditional eFUSE or insulating film breakdown elements.
Solution Approach 2:
The patent replaces the mechanical/thermal breakdown process (eFUSE melting, insulating film breakdown) with an electrical resistance switching mechanism. The variable resistance body changes its electrical properties through voltage application, eliminating the need for high current flow and associated power consumption and heat generation.
2Reliability
If eFUSE or insulating film breakdown type memory elements are used, then non-volatile data storage is achieved, but high current and voltage requirements increase chip size
Solution Approach 1:
The patent changes the operating parameters from high voltage/current breakdown mechanisms to low voltage/current resistance switching. This parameter change allows for smaller device dimensions and higher integration density, as the memory element does not require large areas to dissipate high power or accommodate high voltage breakdown structures.
Solution Approach 2:
The patent transitions from planar breakdown structures to vertically stacked variable resistance body configurations. The variable resistance body is positioned between electrodes in a compact three-dimensional arrangement, enabling higher integration density and reduced chip area compared to traditional lateral breakdown structures.
3Ease of manufacture
If high voltage is applied to cause dielectric breakdown in gate insulating film, then writing is achieved, but peripheral circuit complexity increases
Solution Approach 1:
The patent changes the writing mechanism from high voltage dielectric breakdown to low voltage resistance switching. The variable resistance body can be switched between states by applying voltage through the gate electrode, eliminating the need for complex high voltage generation circuits and peripheral structures required for traditional breakdown-based writing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables compact, low-power non-volatile storage devices and logic circuits that can change output logical values based on memory states, reducing chip size and power consumption while maintaining reliable data storage.
Implementation Method 1
a current flowing between a source region and a drain region of the transistor structure, Joule heat generated by this current
Implementation Method 2
an oxygen absorption layer to stabilize the resistance state
Data Source
AI summary
The present invention provides a memory circuit including a memory element to which writing can be performed with a small current and a low voltage, i.e., low power consumption, and provides a non-volatile storage device that can easily reduce a chip size by using this memory circuit. A memory element 1 is a memory transistor having a transistor structure including a source electrode 14, a drain electrode 15, a gate electrode 11, and, a source region, a drain region, and a channel region made of a metal oxide semiconductor layer 13. The resistance property between the source and the drain shows a low resistance, and the memory transistor is changed to have an ohmic resistance property, regardless of a voltage application state of the gate electrode, by allowing a writing current with a density not less than a predetermined value to flow in the channel region to generate Joule heat. The memory circuit stores information between a state indicating the ohmic resistance property after the writing and a state indicating a current-voltage characteristic as a transistor depending upon the voltage application state to the gate electrode before the writing.