MOS Mixer Biasing for High Linearity and Stable Operating Points
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Solution Overview
Problem
Mixer circuits using metal oxide semiconductor (MOS) transistors face limitations due to limited voltage supply and high flicker noise, requiring complex circuit designs to maintain device operation in proper regions and achieve linearity, which is challenging especially in high-frequency applications.
Innovation Solution
The proposed mixer circuit employs a transconductance stage with transistors operating in saturation and sub-threshold regions, coupled with biasing circuits and switching quads, and transimpedance amplifiers to generate and transform translation currents into corresponding voltages, enhancing linearity through independent biasing and feedback mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If MOSFETs operate in saturation and sub-threshold regions with different bias voltages to achieve non-linearity cancellation, then linearity is improved, but device complexity and biasing circuit complexity increase
Solution Approach 1:
The patent combines multiple biasing networks into a unified biasing structure where a single bias voltage controls both the saturation and sub-threshold region MOSFETs. This merging approach maintains the linearity benefits of operating devices in different regions while eliminating the need for separate, complex biasing circuits for each device, thus reducing overall circuit complexity.
Solution Approach 2:
The biasing circuit is designed to serve multiple functions simultaneously: it provides the necessary bias voltages for MOSFETs operating in different regions (saturation and sub-threshold), enables non-linearity cancellation, and maintains constant DC operating points. This multi-functional design reduces the number of separate circuits needed and simplifies the overall system.
2Reliability
If separate bias networks are provided for MOSFETs to maintain proper operation regions, then device operation reliability is improved, but circuit complexity increases
Solution Approach 1:
Multiple separate bias networks are merged into a single integrated biasing circuit that provides appropriate bias voltages to MOSFETs operating in different regions. This unified approach maintains the reliability benefits of region-specific biasing while reducing the overall number of biasing circuits and simplifying the design.
Solution Approach 2:
The patent incorporates feedback mechanisms in the biasing circuit that automatically adjust bias voltages to maintain MOSFETs in their proper operation regions (saturation and sub-threshold). This feedback control ensures reliable device operation without requiring complex manual biasing networks, as the circuit self-regulates to maintain optimal operating conditions.
3Reliability
If gate to source bias voltage is limited to a small range to maintain proper device operation, then device reliability is improved, but transconductance and output signal level are reduced
Solution Approach 1:
The patent employs dynamic biasing where the gate to source bias voltage is not fixed but can be adjusted within an expanded range while maintaining proper device operation. The biasing circuit dynamically adapts the voltage levels to optimize both reliability and transconductance, allowing operation beyond the traditional small voltage range through controlled adjustment of bias conditions.
Solution Approach 2:
The invention changes the bias voltage parameter from a fixed small range to a dynamically adjustable range. By modifying the bias voltage levels and allowing broader operating ranges, the patent achieves both high transconductance and output signal levels while maintaining device reliability through the integrated feedback control that ensures proper operation region maintenance.
Data Source
AI summary
A mixer is provided. The transconductance stage receives an input signal through an input node and outputs an output signal through an output node. The transconductance stage includes a first transistor coupled between the output node and a first power node, having a first gate coupled to the input node, and operating in a saturation region, a second transistor coupled to the first power node, having a second gate coupled to the input node, and operating in a sub-threshold region, a first biasing circuit providing a first bias voltage, and a third transistor coupled between the output node and the second transistor, and having a third gate coupled to the first bias voltage. The switching quad is coupled to the output node and generates a translation current according to the output signal. The transimpedance amplifier transforms the translation current to a corresponding voltage.