Modulation Transference TRIZ Cases

Using ferromagnetic resonance and spin injection torque, this case enables selective MMIC frequency conversion with switching capability.

Frequency-translated RF and IF filtering replaces discrete SAW filters, duplexers, and inductors to cut cost and simplify wireless chip integration.

An on-chip quadrature mixer and RC filtering impedance replace SAW filters, improving selectivity while cutting noise figure and BOM cost.

Switched RF and IF path selection averages resistor-induced amplitude and phase errors, cutting mixer calibration complexity and power use.

A harmonic and general mixer scheme converts 60 GHz signals with one 20 GHz LO, cutting VCO count, power use, and parasitic sensitivity.

A dual-path circuit uses impedance matching and transconductance noise cancellation to lower LNA noise figure without added current or chip area.

A fractional local oscillator offset separates lower and upper sidebands in comb downconversion, avoiding image response and harmonic mixing.

Non-overlapping 33⅓% duty-cycle clocks suppress third-order mixer harmonics and I-Q image spurs while preserving linearity with lower area and power.

Break-before-make timing and duty-cycle feedback stabilize differential I/Q LO phases, cutting 1/f-noise and DC leakage in RF receivers.

A frequency-translated bandpass filter replaces SAW filters and other discrete RF parts, enabling scalable multi-band receiver integration.

A feedback resistor and second mixer stage suppress LO leakage while preserving input impedance matching and out-of-band linearity.

Load MOS transistors replace resistive elements in a mixer circuit to lower non-linear components without raising consumption current.

Built-in test injection, sensing, and mixer bias adjustment let an RF converter maintain linearity across process and temperature variation.

A reference-signal feedback path cancels clock and mixer jitter in receiver converters, improving dynamic range and signal quality.

Switched-capacitor mixer input matching broadens 60 GHz LNA bandwidth while reducing power dissipation and improving noise figure.

A modulated local oscillator enables in-situ mixer testing and conversion gain checks without changing signal paths or adding hardware.

Frequency-multiplexed IF sharing lets multiple RF signals use one LO, ADC, and baseband path, cutting chip area and power.

DC decoupling between switching and IF transistors cuts mismatch-driven LO feedthrough in Gilbert mixers without added filter complexity.

Embedded low-pass filtering in the voltage-to-current stage cuts chip area and current while preserving up-conversion mixer linearity.

Integrated calibration applies and senses RF test signals to correct demodulator gain drift from transistor, resistor, process, and temperature variations.

Using current bleeding and inductor resonance, this mixer cuts flicker noise and LO switching current while preserving gain and low LO power.

A common-mode feedback circuit stabilizes mixer DC bias across PVT variation, reducing even-order harmonics and preserving linearity.

Differential and common-mode feedback let a Gilbert-cell modulator keep gain accuracy at low supply voltage while cutting power and feed-through.

A selectable direct-conversion and low-IF receiver cuts sampling and filter demands while avoiding 1/f noise on narrow-band signals.

An internal up/down-conversion feedback path measures Tx/Rx IQ imbalance without wireless channel noise, improving calibration accuracy.

Selectable LO buffer and mixer sizing matches receiver gain mode to improve linearity and phase noise while limiting current draw.

A folded transconductor and optimized LO switching pair cut mixer power use while improving linearity and headroom at low supply voltage.

An LC-gated VCO, phase selector, and D flip-flop cut CDR settling time and power for accurate asynchronous packet reception.

Biasing a CMOS mixing transistor in the linear region cuts LO power demand while improving conversion gain and noise figure at millimeter wave.

Unified biasing across saturation and sub-threshold MOSFETs improves mixer linearity while keeping DC operating points stable.

Independent biasing and shared load nodes help this differential mixer suppress harmonic interference while preserving linearity and gain.

Dual frequency conversion with programmable PLL local oscillators enables spurious-free satellite repeater tuning without switch losses.

Feeds back part of the converted output through the same analog conversion path to measure spurs and derive correction data without an ideal receiver.

By merging quadrature modulation, gain control, and RF power amplification, this circuit cuts harmonic distortion, area redundancy, and power use.

A tri-state chopper mixer uses ternary LO signals to suppress odd-order harmonics and cut spurious mixing in direct conversion TV tuners.

A bias circuit offsets drain current and load resistance variation to keep amplifier gain constant while stabilizing output DC voltage and distortion.

An active balancing element replaces bulky baluns to keep a mixer balanced across wide RF and LO ranges while reducing size and cost.

A current buffer between the passive mixer and TIA raises output impedance to cut IF-stage noise and lower power in RF downconversion.

A single mixer handles multiple RF inputs without extra switches, cutting circuit area and parasitic attenuation in UWB receivers.

Balanced rectangular pulse mixing on one IC improves converter linearity while reducing intermodulation distortion and spurious responses.

Parallel tri-state chopper circuits use ternary timing signals to suppress 3rd, 5th, and 7th harmonic mixing in direct conversion.

A non-integer LO-to-RF ratio uses digital IF spectral replicas to prevent frequency pulling and reduce filtering demands.

Intermittent control of grounded-gate mixer stages cuts UWB receiver power use while preserving conversion gain and reducing DC offset.

Parallel transistors that turn on at different gate voltages smooth parasitic variation and improve frequency mixer linearity.

Native MOSFET switching and high-value resistors cut flicker noise while preserving voltage gain and low power in a passive mixer buffer.

By lowering equivalent load during LO switching transients, this mixer suppresses flicker noise without adding LO leakage or DC offset.

A dual feedback and current-bleeding mixer cuts flicker noise while stabilizing common-mode voltage to preserve gain and spectral purity.

A sampling-stage demodulator separates modulated charge-current signals with less circuit complexity, smaller chip area, and lower noise.

A switch-capacitor filtering module removes low-frequency components so the mixer cuts noise figure and avoids extra impedance matching circuits.

Mode switching inside the mixer replaces frequency selection switches, enabling faster frequency changes with lower power and less circuit complexity.