Semiconductor Demodulation Sampling Circuit for Small Current Signals
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Solution Overview
Problem
Existing demodulation devices for electronic signals are complex, large, and inefficient, particularly at high frequencies, and struggle with small modulated currents like photo-currents, requiring multiple transistors and accurate matching, which increases chip size and reduces fabrication yield.
Innovation Solution
A compact demodulation device in semiconductor technology that processes both voltage and current signals using a sampling stage with transfer means, allowing for high integration and efficient demodulation of signals in the charge domain, suitable for CMOS or CCD processes, and is not photo-sensitive to avoid noise from light-generated electrons.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If mixer circuits with dual-gate transistors are used for demodulation, then demodulation function is achieved, but device complexity and chip size increase
Solution Approach 1:
The patent extracts the essential demodulation function from complex mixer circuits and implements it using a simplified sampling-based approach. Instead of using dual-gate transistors and multiple mixing elements, the invention uses a single sampling circuit that directly samples the modulated signal at specific time points, eliminating the need for complex mixing stages while maintaining demodulation capability.
Solution Approach 2:
The patent replaces the mechanical/electronic mixing process with a sampling-based digital approach. By sampling the modulated signal at precise time intervals and using digital processing to extract the demodulated information, the invention substitutes the analog mixing mechanism with a more compact sampling system, reducing device complexity.
2Measurement precision
If multiple dual-gate transistors and load resistors are used, then demodulation accuracy is improved, but chip area increases
Solution Approach 1:
The patent merges multiple functions into a single sampling circuit. Instead of using separate dual-gate transistors, load resistors, and filtering circuits, the invention combines the sampling, signal separation, and demodulation functions into one compact circuit that achieves the same accuracy with minimal chip area.
Solution Approach 2:
The sampling circuit is designed to perform multiple functions simultaneously: it samples the modulated signal, separates the signal components through timing control, and enables demodulation. This multi-functional approach eliminates the need for dedicated circuits for each function, reducing overall chip area while maintaining precision.
3Device complexity
If four-terminal RF mixer is used, then transistor count is reduced, but fabrication complexity and matching requirements increase
Solution Approach 1:
The patent uses standard CMOS or CCD process components that are inexpensive and easily fabricated, replacing the specialized four-terminal RF mixer transistors. The sampling circuit uses conventional transistors and capacitors that are readily available in standard semiconductor processes, eliminating the need for complex custom transistor structures and reducing fabrication matching requirements.
4Reliability
If mixing circuit is used for small modulated currents, then demodulation is achieved, but noise from current domain mixing increases
Solution Approach 1:
The patent replaces the current-domain mixing process with a voltage-domain sampling approach. By sampling the voltage signal and using capacitive storage to hold the sampled values, the invention avoids the noisy current mixing process and achieves demodulation with significantly reduced noise, particularly for small modulated currents like photo-currents.
Data Source
AI summary
A demodulation device (1) in semiconductor technology is disclosed. The device (1) is capable of demodulating an injected modulated current. The device (1) comprises an input node (IN1), a sampling stage (DG1, IG1, GS1, IG2, DG2) and at least two output nodes (D1, D2). The sampling stage DG1, IG1, GS1, IG2, DG2) comprises transfer means (GL, GM, GR) for transferring a modulated charge-current signal from the input node (IN1) to one of the output nodes (D1, D2) allocated to the respective time interval within the modulation period. The small size and the ability to reproduce the device (1) in standard semiconductor technologies make possible a cost-efficient integration of the device (1).