MOS RF Switch Topology for Symmetrical DCO Capacitive Tuning
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Solution Overview
Problem
Non-symmetrical transient frequency response caused by switching tuning capacitances in frequency modulated digitally controlled oscillators (DCOs) leads to signal distortion and degradation in signal quality parameters like Error Vector Magnitude (EVM) due to different time constants for turning on and off varactor cells.
Innovation Solution
Implementing a switch topology with finite impedance, utilizing a combination of NMOS and PMOS devices to provide a predefined DC voltage and resistance when the switch is off, reducing the difference in time constants for turning on and off varactor cells, thus mitigating modulation distortion and preserving the quality factor of LC DCOs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional switches are used to turn on and off varactor cells, then the RF signal path can be switched, but the switching transient becomes non-symmetrical due to different time constants for turning on and off, causing signal distortion and EVM degradation
Solution Approach 1:
The patent introduces an auxiliary switch as an intermediary component working in conjunction with the main switch. The auxiliary switch actively participates in the switching process to balance the turn-on and turn-off time constants, creating symmetrical transient response. This mediator component enables both switches to cooperate in achieving reliable signal switching without distortion.
Solution Approach 2:
The patent modifies the switching parameters by introducing controlled impedance paths during switching transitions. By changing the impedance characteristics and adding the auxiliary switching path, the time constants for turn-on and turn-off are equalized, transforming the asymmetrical switching behavior into symmetrical behavior while maintaining signal integrity.
2Reliability
If simple switch topologies are used, then device complexity is low, but the switching transient causes modulation distortion and degradation in signal quality parameters
Solution Approach 1:
The auxiliary switch acts as a mediator that adds minimal complexity while significantly improving signal quality. This additional component enables symmetrical switching by providing a controlled path for charge/discharge of parasitic capacitances, thereby reducing modulation distortion without requiring complex circuitry.
Solution Approach 2:
The patent deliberately introduces asymmetry in the form of an auxiliary switch to counterbalance the inherent asymmetry in the main switch's turn-on and turn-off characteristics. By adding this controlled asymmetry, the overall switching behavior becomes symmetrical, improving signal quality while maintaining relatively simple device architecture.
3Productivity
If fast switching is implemented, then productivity is improved, but the non-symmetrical transient response causes frequency modulation distortion
Solution Approach 1:
The auxiliary switch serves as a mediator that enables fast switching while maintaining modulation accuracy. It provides a controlled pathway that balances the switching transients, allowing rapid capacitance changes without introducing frequency modulation distortion, thus achieving both high productivity and reliable signal quality.
Solution Approach 2:
The patent changes the switching parameters by introducing controlled impedance and auxiliary switching paths that equalize the time constants. This allows fast switching operation while preventing the non-symmetrical transient that would otherwise cause frequency modulation distortion, maintaining both speed and accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed switch topologies reduce modulation distortion and maintain phase noise performance by ensuring a symmetrical switching transient, improving the signal quality and frequency settling behavior of DCOs.
Implementation Method 1
A switch design may be provided that includes a main switch device, a first auxiliary n-channel metal-oxide-semiconductor (NMOS) device, a second auxiliary NMOS device, and a pair of p-channel metal-oxide-semiconductor (PMOS) devices
Implementation Method 2
The turning off and on of the varactor cells means closing/opening the RF signal path through the capacitance by opening/closing a switch that is connected in series to the capacitance(s)
Data Source
AI summary
Various designs for MOS transistor-based RF switch topologies for high speed capacitive tuning of oscillators switch circuits include a main switch device comprising a gate connected to a control terminal, a drain connected to a first terminal that is connected to the first capacitor, and a source connected to a second terminal that is connected to the second capacitor. The switch further comprises a first NMOS device having a gate connected to the main switch device gate, a source connected to a ground, and a drain connected to the first terminal. The switch further comprises a second NMOS device having a gate connected to the main switch device gate, a source connected to a ground, and a drain connected to the second terminal. The switch further comprises a pair of PMOS devices each having drains connected respectively to the first and second terminals.