Cascaded MOS Sampling Switch for Low-Leakage Hold Circuits

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Solution Overview

Problem

Conventional sampling switches in integrated semiconductor circuits suffer from significant leakage currents, especially at elevated temperatures, which degrade charge preservation and increase power consumption, making it challenging to maintain voltage levels over long hold times.

Innovation Solution

A cascade configuration of MOS transistors is used, where each transistor's backgate diode is connected in series, with the last diode coupled to the supply voltage, delaying parasitic charging and discharging of the sampling capacitor, and smaller buffer capacitors are employed to minimize capacitance values, reducing leakage currents and chip area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the capacitance value of the sampling capacitor is increased to overcome leakage current effects, then charge preservation is improved, but chip area and cost increase

Engineering Contradiction:
Improvecharge preservationVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent changes the voltage parameter of the backgate to reverse-bias the parasitic diodes, transforming the leakage behavior from forward-bias to reverse-bias mode. This parameter change enables the use of smaller capacitors while maintaining charge preservation, as the reverse-biased diodes exhibit exponentially lower leakage currents.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent converts the harmful effect of parasitic backgate diodes into a beneficial feature by reverse-biasing them. The same diodes that cause leakage in forward-bias mode become leakage-blocking elements when reverse-biased, turning the problem into a solution that enables smaller capacitor sizes.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Duration of action of stationary object

If larger capacitors are used to maintain charge preservation, then hold time is extended, but power consumption increases

Engineering Contradiction:
Improvehold timeVSAvoidpower consumption
Core Design Contradiction:
Duration of action of stationary objectVSUse of energy by stationary object

Solution Approach 1:

By changing the backgate voltage parameter to reverse-bias the parasitic diodes, the patent reduces leakage currents exponentially. This enables smaller capacitors to be used for the same hold time, thereby reducing the power consumption required to maintain the sampled voltage over extended periods.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If conventional sampling switches are used, then device complexity is low, but leakage current is significant

Engineering Contradiction:
Improveswitch structureVSAvoidleakage current
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The patent makes the sampling switch self-correcting by utilizing its own parasitic backgate diodes. By reverse-biasing these inherent diodes through backgate voltage control, the switch automatically compensates for its own leakage currents without requiring external active compensation circuits, maintaining simplicity while reducing leakage.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent changes the electrical parameter (voltage) of the backgate to transform the behavior of parasitic diodes from harmful to beneficial, enabling the simple switch structure to achieve low leakage performance through parameter optimization rather than structural complexity.

Inventive Principle:
Principle #35Parameter changes

4Object-generated harmful factors

If backgate voltage is controlled to reverse-bias diodes, then leakage current is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improveleakage currentVSAvoidvoltage control precision
Core Design Contradiction:
Object-generated harmful factorsVSManufacturing precision

Solution Approach 1:

The patent exploits the exponential relationship of reverse-biased diodes, where even moderate reverse voltages produce exponentially small leakage currents. This characteristic reduces the sensitivity to voltage control precision, as the system benefits from the inherent exponential suppression of leakage rather than requiring ultra-precise voltage control.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration substantially prolongs hold time, minimizes voltage changes on the sampling capacitor, and reduces the size and power consumption of integrated circuits by leveraging the exponential dependency of reverse-biased backgate diode currents, while maintaining efficient charge preservation.

Implementation Method 1

the backgate diodes of the transistors are configured as a chain or a series of backgate diodes... The current through a reverse biased backgate diode depends exponentially on the voltage drop across the diode

Methodology Applied
Scientific EffectReverse bias: Diode

Data Source

PatentUS20100201433A1Low Leakage Sampling Switch
Publication Date: 2010.08.12 TEXAS INSTRUMENTS INC
  • US20100201433A1 patent drawing
  • US20100201433A1 patent drawing
  • US20100201433A1 patent drawing

AI summary

An electronic device includes a cascade of a plurality of transistors. Each transistor of the cascade receives an input voltage at a first terminal of its source/drain channel and receives a sampling clock signal at a control gate. The second terminal of the source/drain path of a first transistor drives a sampling capacitor. The second terminal of the source/drain channel of each subsequent transistor is connected to a backgate of a previous transistor. The backgate of the last transistor is connected to a supply voltage level. The second terminals of the subsequent transistors may be connected to corresponding buffer capacitors. The backgate of the last transistor may be supplied with the input during sampling and the supply voltage level at other times.