MOS Image Sensor Manufacturing Reducing Contact Resistance
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Solution Overview
Problem
CMOS image sensors face high contact resistances and potential metal contamination in the pixel region due to the avoidance of salicides, which adversely impact signal transmission.
Innovation Solution
A manufacturing method that forms conductive bodies with a top surface higher than the substrate in the pixel region, allowing salicide layers to be formed away from the substrate, thereby avoiding metal contamination and reducing contact resistances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If salicides are avoided from forming in the pixel region to prevent metal contamination, then metal contamination is prevented, but contact resistances increase and signal transmission is adversely impacted
Solution Approach 1:
The substrate surface is segmented into different regions: a first region (pixel region) where salicide is prevented to avoid metal contamination, and a second region (periphery region) where salicide is formed to reduce contact resistance. This spatial segmentation allows simultaneous optimization of both contamination prevention and electrical performance in different areas of the device.
Solution Approach 2:
Different surface treatments are applied to different regions of the substrate. The pixel region maintains a specific surface structure that prevents salicide formation and metal contamination, while the periphery region undergoes salicide formation to achieve low contact resistance. Each region has locally optimized properties suited to its functional requirements.
2Reliability
If salicide layers are formed in the pixel region to reduce contact resistances, then contact resistances are reduced and signal transmission is improved, but metal contamination occurs in the pixel region
Solution Approach 1:
The substrate surface is segmented into different regions: a first region (pixel region) where salicide is prevented to avoid metal contamination, and a second region (periphery region) where salicide is formed to reduce contact resistance. This spatial segmentation allows simultaneous optimization of both contamination prevention and electrical performance in different areas of the device.
Solution Approach 2:
Different surface treatments are applied to different regions of the substrate. The pixel region maintains a specific surface structure that prevents salicide formation and metal contamination, while the periphery region undergoes salicide formation to achieve low contact resistance. Each region has locally optimized properties suited to its functional requirements.
3Object-affected harmful factors
If salicide layers are formed away from the substrate to avoid metal contamination, then metal contamination is avoided, but contact resistances remain high
Solution Approach 1:
The substrate surface is segmented into different regions: a first region (pixel region) where salicide is prevented to avoid metal contamination, and a second region (periphery region) where salicide is formed to reduce contact resistance. This spatial segmentation allows simultaneous optimization of both contamination prevention and electrical performance in different areas of the device.
Solution Approach 2:
Different surface treatments are applied to different regions of the substrate. The pixel region maintains a specific surface structure that prevents salicide formation and metal contamination, while the periphery region undergoes salicide formation to achieve low contact resistance. Each region has locally optimized properties suited to its functional requirements.
Data Source
AI summary
A method for manufacturing semiconductor devices includes following steps. A substrate having a pixel region and a periphery region defined thereon is provided, and at least a transistor is formed in the pixel region. A blocking layer is formed on the substrate, and the blocking layer includes a first opening exposing a portion of the substrate in the pixel region and a second opening exposing a portion of the transistor. A first conductive body is formed in the first opening and a second conductive body is formed in the second opening, respectively. The first conductive body protrudes from the substrate and the second conductive body protrudes from the transistor. A portion of the blocking layer is removed. A first salicide layer is formed on the first conductive body and a second salicide layer is formed on the second conductive body, respectively.