MOS Temperature Sensor Circuit for Cross-Node Linearity
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Solution Overview
Problem
Existing temperature sensing circuits experience linearity degradation when extended across different technology nodes, particularly in bulk semiconductor and partially depleted semiconductor on insulator (SOI) substrates, affecting their accuracy and reliability in temperature measurement.
Innovation Solution
A temperature sensor circuit design utilizing a first MOS transistor operating in weak inversion mode with a negative temperature coefficient drain-source resistance, coupled with a second MOS transistor operating in strong inversion mode to impose a drain-source current, ensuring a positive temperature coefficient output voltage, and optionally incorporating a third MOS transistor for improved performance on various substrate technologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If existing temperature sensing circuits are extended to different technology nodes, then manufacturing versatility is improved, but measurement precision deteriorates due to linearity degradation
Solution Approach 1:
The patent changes the operating parameters of MOS transistors by utilizing weak inversion mode for the first transistor and strong inversion mode for the second transistor. This parameter change enables the circuit to maintain linear temperature measurement characteristics across different technology nodes (bulk, PD-SOI, FD-SOI), resolving the linearity degradation issue while preserving manufacturing versatility
Solution Approach 2:
The patent inverts the conventional approach by using weak inversion mode (typically associated with low current) to achieve high precision temperature measurement. This inversion of the expected operating mode allows the circuit to maintain accuracy across technology nodes while avoiding the linearity degradation that occurs in conventional strong inversion-based designs
2Power
If MOS transistors operate in strong inversion mode, then current driving capability is improved, but power consumption increases
Solution Approach 1:
The patent applies different operating modes to different transistors within the same circuit: the first MOS transistor operates in weak inversion mode for high input impedance and low power consumption, while the second MOS transistor operates in strong inversion mode for adequate current driving capability. This local differentiation of operating characteristics resolves the contradiction between power efficiency and driving capability
Solution Approach 2:
The circuit dynamically balances the operating modes of its components, using weak inversion for the sensing element (first transistor) to minimize power consumption while using strong inversion for the current source (second transistor) to provide necessary driving capability. This dynamic allocation of operating modes optimizes both power efficiency and performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves a compact, low-power temperature sensing module with improved linearity across different technology nodes, maintaining accuracy and reliability in temperature measurement, especially on bulk and SOI substrates, by optimizing the operation of MOS transistors and substrate configurations.
Implementation Method 1
a first MOS transistor configured to operate in weak inversion mode and have a negative temperature coefficient drain-source resistance
Implementation Method 2
a second MOS transistor configured to operate in strong inversion mode and have a gate leakage current which imposes the drain-source current of the first MOS transistor
Data Source
AI summary
An electronic device includes a module that delivers a positive temperature coefficient output voltage at an output terminal. A thermistor includes a first MOS transistor operating in weak inversion mode and having a negative temperature coefficient drain-source resistance and whose source is coupled to the output terminal. A current source coupled to the output terminal operates to impose the drain-source current of the first transistor.