MOS TFT Fabrication with Reduced Photolithography Steps
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Solution Overview
Problem
The conventional crystalline silicon TFT manufacturing process is complex and time-consuming due to the requirement of multiple photolithography steps, leading to increased costs and reduced throughput and yield.
Innovation Solution
A method for fabricating a metal oxide semiconductor with a lightly doped drain (LDD) using a reduced number of photolithography steps, where the gate electrode, LDD, and source/drain electrode are defined simultaneously, and ion implantations are performed after the formation of gate electrodes to simplify the process while maintaining electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional crystalline silicon TFT manufacturing process is used, then high mobility and fewer surface defects are achieved, but the number of photolithography steps increases to nine, leading to increased costs and reduced throughput
Solution Approach 1:
The patent combines multiple process steps into fewer photolithography steps. Specifically, it merges the formation of gate electrode, LDD region, and source/drain electrode into a single photolithography process, reducing the total number of steps from nine to six while maintaining the quality of crystalline silicon TFTs.
Solution Approach 2:
The patent performs ion implantations for LDD and source/drain regions after gate electrode formation, but before final contact hole etching. This preliminary action allows multiple doped regions to be created in sequence within the same photolithography cycle, reducing overall process steps and improving throughput.
2Reliability
If conventional crystalline silicon TFT manufacturing process is used, then high mobility is achieved, but the number of photolithography steps increases to nine, leading to increased process complexity and time consumption
Solution Approach 1:
The patent merges the formation of gate electrode, LDD region, and source/drain electrode into a single photolithography process, reducing the total number of steps from nine to six. This consolidation maintains the high mobility characteristics of crystalline silicon TFTs while significantly simplifying the overall manufacturing process.
Solution Approach 2:
The patent segments the ion implantation process into distinct stages (LDD implantation followed by source/drain implantation) within the same photolithography cycle. This segmentation allows precise control of doping profiles while reducing the number of separate photolithography steps required.
3Reliability
If conventional crystalline silicon TFT manufacturing process is used, then high mobility is achieved, but the number of photolithography steps increases to nine, leading to reduced yield
Solution Approach 1:
The patent combines multiple critical process steps into fewer photolithography operations, reducing the total from nine to six steps. This reduction minimizes the cumulative effect of alignment errors and process variations across multiple steps, thereby improving manufacturing yield while preserving the high mobility characteristics of crystalline silicon TFTs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the number of photolithography steps from nine to six, improving yield and throughput, and allows for better control of critical dimensions, reducing alignment errors and process complexity.
Implementation Method 1
p-type ion implantation of the exposed silicon island 13p
Data Source
AI summary
A method for fabricating metal oxide semiconductor with lightly doped drain. In the method, the gate electrode, the LDD of the n-type MOS TFT, and the source/drain electrode of the p-type MOS TFT are defined simultaneously in one photolithography step. The contact holes and the source/drain electrode of the n-type MOS TFT are also defined simultaneously in one photolithography step. The invention employs only six photolithography steps to manufacture the metal oxide semiconductor, such as TFT, with lightly doped drain, thereby avoiding alignment errors, further improving yield and increasing throughput.