Amplifying MOS Transistor Depletion Layer for CMOS Sensor Noise Reduction

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Solution Overview

Problem

Conventional CMOS sensors face issues with 1/f noise and reduced gain due to back gate bias effects, leading to increased noise levels and lower sensitivity, as signal charges are absorbed in components other than the photodiode.

Innovation Solution

The amplifying MOS transistor is formed in a first semiconductor layer with the same conductivity type as the source and drain, with a low impurity concentration, and a depletion layer is formed between the source and drain, minimizing substrate bias effects and creating a potential barrier to prevent signal charge absorption in the source/drain regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the amplifying MOS transistor is formed in a conventional semiconductor structure, then the device can be manufactured using standard CMOS processes, but 1/f noise increases and gain decreases due to back gate bias effects

Engineering Contradiction:
ImproveCMOS process compatibilityVSAvoid1/f noise and back gate bias effects
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The semiconductor structure is segmented into distinct layers: a first semiconductor layer for the photodiode and a second semiconductor layer for the amplifying MOS transistor. This segmentation allows the transistor to be formed in a separate region with different electrical characteristics, isolating it from the back gate bias effects that would otherwise occur in a conventional single-layer structure. The physical and electrical separation reduces noise coupling while maintaining CMOS process compatibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An insulating layer is introduced as an intermediary between the first semiconductor layer (photodiode) and the second semiconductor layer (amplifying MOS transistor). This insulating layer acts as a mediator that electrically isolates the transistor from substrate effects, eliminating the back gate bias problem while allowing both components to coexist in a CMOS-compatible structure. The insulator prevents harmful electrical interactions between layers.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If signal charges are transferred to the floating diffusion region, then the signal can be amplified and output, but signal charges are absorbed in the source/drain regions of the amplifying MOS transistor, reducing sensitivity

Engineering Contradiction:
Improvesignal amplification and output capabilityVSAvoidsignal charge absorption and sensitivity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The second semiconductor layer where the amplifying MOS transistor is formed is given different local qualities compared to the first semiconductor layer. Specifically, it has optimized doping concentrations and electrical characteristics tailored for transistor operation. This local differentiation ensures that the source/drain regions have appropriate potential barriers to prevent signal charge absorption, while maintaining high amplification capability in the channel region.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The structure is designed with preliminary anti-action by creating potential barriers in the source/drain regions through specific doping profiles in the second semiconductor layer. These pre-established barriers prevent signal charges from being absorbed into the source/drain regions before they can be properly transferred to the floating diffusion region, thus counteracting the harmful absorption effect in advance.

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces 1/f noise, enhances gain, and improves sensitivity by minimizing substrate bias effects and preventing signal charge absorption in non-photodiode components, resulting in a CMOS sensor with lower noise and higher sensitivity.

Implementation Method 1

a photodiode for accumulating signal charges generated due to incident light

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Implementation Method 2

a depletion layer is formed between the source and drain, minimizing substrate bias effects and creating a potential barrier to prevent signal charge absorption

Methodology Applied
Scientific EffectDepletion layer formation: Electric Field

Data Source

PatentUS8183604B2Solid state image pickup device inducing an amplifying MOS transistor having particular conductivity type semiconductor layers, and camera using the same device
Publication Date: 2012.05.22 CANON KK
  • US8183604B2 patent drawing
  • US8183604B2 patent drawing
  • US8183604B2 patent drawing

AI summary

To provide an amplification type solid state image pickup device enabling lower noise, higher gain, and higher sensitivity than any conventional amplification type solid state image pickup device. A solid state image pickup device according to the present invention includes an arrangement of a plurality of unit pixels each of which includes at least: a photodiode for accumulating a signal charge generated by an incident light; and an amplifying MOS transistor receiving the signal charge at a control electrode, amplifying the signal charge and outputting an amplified signal, wherein: the amplifying MOS transistor is formed in a first semiconductor layer of a first conductivity type which is the same conductivity type as source and drain of the amplifying MOS transistor, the first semiconductor layer has an impurity concentration lower than that of the source and drain, and the first semiconductor layer is depleted between the source and drain at least during an amplifying operation of the amplifying MOS transistor.